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Masao Hotta
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2020 – today
- 2023
- [j16]Eiki Kayama, Kenta Mori, Taichi Maebou, Yuanchi Chen, Hao San, Tatsuji Matsuura, Masao Hotta:
Thermal Noise Analysis of Ring Amplifier in Cyclic Analog-to-Digital Converter. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 106(5): 823-831 (2023) - 2021
- [c18]Eiki Kayama, Kenta Mori, Taichi Maebou, Yuanchi Chen, Hao San, Tatsuji Matsuura, Masao Hotta:
A 0.8V 14bit 294kSPS non-binary cyclic ADC in 65nm SOTB CMOS technology. ISPACS 2021: 1-2 - [c17]Taichi Maebou, Yuanchi Chen, Eiki Kayama, Kenta Mori, Hao San, Tatsuji Matsuura, Masao Hotta:
A 0.7V 14bit Hybrid ADC in 65nm SOTB CMOS. ISPACS 2021: 1-2 - [c16]Kenta Mori, Eiki Kayama, Taichi Maebou, Yuanchi Chen, Hao San, Tatsuji Matsuura, Masao Hotta:
A Low-voltage Non-binary Cyclic ADC using Fully Differential Ring Amplifier. ISPACS 2021: 1-2
2010 – 2019
- 2019
- [c15]Shuichiro Yamada, Toshiki Ohtsu, Minami Sasaki, Hao San
, Tatsuji Matsuura, Masao Hotta:
A 0.8V 14bit 62.5kSPS non-binary cyclic ADC using SOTB CMOS technology. ISPACS 2019: 1-2 - 2017
- [j15]Hao San
A 12-bit 1.25MS/s Area-Efficient Radix-Value Self-Estimated Non-Binary Cyclic ADC with Relaxed Requirements on Analog Components. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(2): 534-540 (2017) - [c14]Yuki Watanabe, Hayato Narita, Hiroyuki Tsuchiya, Tatsuji Matsuura, Hao San
A 14bit 80kSPS non-binary cyclic ADC without high accuracy analog components. ASP-DAC 2017: 15-16 - [c13]Hiroyuki Tsuchiya, Asato Uchiyama, Yuta Misima, Yuki Watanabe, Tatsuji Matsuura, Hao San
Non-binary cyclic ADC with correlated level shifting technique. ASP-DAC 2017: 17-18 - [c12]Koken Chin, Yuta Mishima, Yuki Watanabe, Hiroyuki Tsuchiya, Hao San
A 12-Bit 3.3MS/S pipeline cyclic ADC with correlated level shifting technique. ISPACS 2017: 602-605 - [c11]Hiroyuki Tsuchiya, Yuki Watanabe, Koken Chin, Hao San
The design of a 14-bit 400kSPS non-binary pipeline cyclic ADC. ISPACS 2017: 606-610 - [c10]Yuki Watanabe, Koken Chin, Hiroyuki Tsuchiya, Hao San
Experimental results of reconfigurable non-binary cyclic ADC. ISPACS 2017: 611-615 - 2015
- [c9]Yuta Mishima, Toshiki Yamada, Asato Uchiyama, Tatsuji Matsuura, Hao San
A 10-bit 10Ms/s pipeline cyclic ADC based on β-expansion. ISPACS 2015: 294-298 - 2014
- [j14]Rompei Sugawara, Hao San
Experimental Implementation of Non-binary Cyclic ADCs with Radix Value Estimation Algorithm. IEICE Trans. Electron. 97-C(4): 308-315 (2014) - [c8]Hao San
An area-efficient 12-bit 1.25MS/s radix-value self-estimated non-binary ADC with relaxed requirements on analog components. CICC 2014: 1-4 - 2013
- [j13]Hao San
Non-binary Pipeline Analog-to-Digital Converter Based on β-Expansion. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(2): 415-421 (2013) - [j12]Rie Suzuki, Tsubasa Maruyama, Hao San
Robust Cyclic ADC Architecture Based on β-Expansion. IEICE Trans. Electron. 96-C(4): 553-559 (2013) - [c7]Takaki Makino, Yukiko Iwata, Yutaka Jitsumatsu, Masao Hotta, Hao San
Rigorous analysis of quantization error of an A/D converter based on β-map. ISCAS 2013: 369-372 - 2010
- [j11]Tomohiko Ogawa, Haruo Kobayashi, Yosuke Takahashi, Nobukazu Takai, Masao Hotta, Hao San
SAR ADC Algorithm with Redundancy and Digital Error Correction. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(2): 415-423 (2010) - [j10]Koichi Ono, Takeshi Ohkawa, Masahiro Segami, Masao Hotta:
A Cascaded Folding ADC Based on Fast-Settling 3-Degree Folders with Enhanced Reset Technique. IEICE Trans. Electron. 93-C(3): 288-294 (2010) - [c6]Tomohiko Ogawa, Tatsuji Matsuura, Haruo Kobayashi, Nobukazu Takai, Masao Hotta, Hao San
Non-binary SAR ADC with digital error correction for low power applications. APCCAS 2010: 196-199
2000 – 2009
- 2009
- [c5]Kazuya Shimizu, Masato Kaneta, HaiJun Lin, Haruo Kobayashi, Nobukazu Takai, Masao Hotta:
A Time-to-Digital Converter with small circuitry. ASP-DAC 2009: 109-110 - 2008
- [c4]Tomohiko Ogawa, Haruo Kobayashi, Masao Hotta, Yosuke Takahashi, Hao San
SAR ADC algorithm with redundancy. APCCAS 2008: 268-271 - 2007
- [j9]Hao San, Yoshitaka Jingu, Hiroki Wada, Hiroyuki Hagiwara, Akira Hayakawa, Haruo Kobayashi, Tatsuji Matsuura, Kouichi Yahagi, Junya Kudoh, Hideo Nakane, Masao Hotta, Toshiro Tsukada, Koichiro Mashiko, Atsushi Wada:
A Second-Order Multibit Complex Bandpass DeltaSigmaAD Modulator with I, Q Dynamic Matching and DWA Algorithm. IEICE Trans. Electron. 90-C(6): 1181-1188 (2007) - [c3]Hao San
A 2.8-V Multibit Complex Bandpass Delta-Sigma-AD Modulator in 0.18µm CMOS. ASP-DAC 2007: 96-97 - 2006
- [j8]Hao San, Akira Hayakawa, Yoshitaka Jingu, Hiroki Wada, Hiroyuki Hagiwara, Kazuyuki Kobayashi, Haruo Kobayashi, Tatsuji Matsuura, Kouichi Yahagi, Junya Kudoh, Hideo Nakane, Masao Hotta, Toshiro Tsukada, Koichiro Mashiko, Atsushi Wada:
Complex Bandpass DeltaSigmaAD Modulator Architecture without I, Q-Path Crossing Layout. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(4): 908-915 (2006) - [j7]Masafumi Uemori, Haruo Kobayashi, Tomonari Ichikawa, Atsushi Wada, Koichiro Mashiko, Toshiro Tsukada, Masao Hotta:
High-Speed Continuous-Time Subsampling Bandpass DeltaSigmaAD Modulator Architecture Employing Radio Frequency DAC. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(4): 916-923 (2006) - [j6]Masao Hotta, Tatsuji Matsuura:
Key Technologies for Miniaturization and Power Reduction of Analog-to-Digital Converters for Video Use. IEICE Trans. Electron. 89-C(6): 664-672 (2006) - 2005
- [c2]Osamu Matsumoto, Hisashi Harada, Yasuo Morimoto, Toshio Kumamoto, Takahiro Miki, Masao Hotta:
An 11-bit 160-MS/s 1.35-V 10-mW D/A converter using automated device sizing system. ASP-DAC 2005: 809-814 - 2002
- [c1]Mike Brunoli, Masao Hotta, Felicia James, Rudy Koch, Roy McGuffin, Andrew J. Moore:
Analog intellectual property: now? Or never? DAC 2002: 181-182
1990 – 1999
- 1996
- [j5]Keiko Makie-Fukuda, Takanobu Anbo, Toshiro Tsukada, Tatsuji Matsuura, Masao Hotta:
Voltage-comparator-based measurement of equivalently sampled substrate noise waveforms in mixed-signal integrated circuits. IEEE J. Solid State Circuits 31(5): 726-731 (1996) - [j4]Keiko Makie-Fukuda, Takanobu Anbo, Toshiro Tsukada, Tatsuji Matsuura, Masao Hotta:
Correction to "Voltage-Comparator-Based Measurement of Equivalentiy Samlpled Substrate Noise Wavefor. IEEE J. Solid State Circuits 31(8): 1226 (1996) - 1995
- [j3]Keiko Makie-Fukuda, Takafumi Kikuchi, Tatsuji Matsuura, Masao Hotta:
Measurement of digital noise in mixed-signal integrated circuits. IEEE J. Solid State Circuits 30(2): 87-92 (1995) - 1992
- [j2]Kensuke Sekihara, Yukiko Ogura, Masao Hotta:
Maximum-likelihood estimation of current-dipole parameters for data obtained using multichannel magnetometer. IEEE Trans. Biomed. Eng. 39(6): 558-562 (1992)
1980 – 1989
- 1989
- [j1]Toshihiko Shimizu, Masao Hotta, Kenji Maio, Seiichi Ueda:
A 10-bit 20-MHz two-step parallel A/D converter with internal S/H. IEEE J. Solid State Circuits 24(1): 13-20 (1989)
Coauthor Index
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