Teymourzadeh, Rozita and Othman, Masuri (2006): An Overview of the Decimation process and its VLSI implementation. Published in: Research Student Seminar SPS2006 (1 February 2006): pp. 207-211.
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Abstract
Digital Decimation process plays an important task in communication system. It mostly is applied in transceiver when the frequency reduction is required. However, the decimation process for sigma delta modulator is considered in this research work. The proposed design was simulated using MATLAB software and implemented by hardware description language in Xilinx environment. Furthermore, the proposed advance arithmetic unit is applied to improve the system efficiency.
| Item Type: | MPRA Paper |
|---|---|
| Original Title: | An Overview of the Decimation process and its VLSI implementation |
| English Title: | An Overview of the Decimation process and its VLSI implementation |
| Language: | English |
| Keywords: | Decimation; CIC; comb; Filters; Converters; Sigma Delta A/D conversion; comb filters; decimation filters; |
| Subjects: | L - Industrial Organization > L0 - General L - Industrial Organization > L6 - Industry Studies: Manufacturing F - International Economics > F1 - Trade > F14 - Empirical Studies of Trade L - Industrial Organization > L7 - Industry Studies: Primary Products and Construction O - Economic Development, Innovation, Technological Change, and Growth > O1 - Economic Development > O14 - Industrialization ; Manufacturing and Service Industries ; Choice of Technology |
| Item ID: | 41945 |
| Depositing User: | Dr. Rozita Teymourzadeh |
| Date Deposited: | 16 Oct 2012 10:48 |
| Last Modified: | 26 Sep 2019 09:41 |
| References: | Hogenauer EB, (1981).An economical class of digital filters for decimation and interpolation, IEEE transactions on acoustic, Sunnyvale, CA.Assp-29(2):155-162 Pervez M. Aziz, Henrik V. Sorensen & Jan Van Der Spiegel, (1996) An Overview of Sigma –Delta Converter, IEEE Signal processing magazine, 1053-5888/96, 61-82 Charles D. Thompson , (1989). A VLSI Sigma Delta A/D Converter for Audio and Signal Processing Applications, IEEE, Motorola DSP Operations, Austin , Texas, CH2673-2/89/0000-2569 IEEE. Brian P. Brandt and Bruce A. Wooley, (1994) A Low-Power, Area-Efficient Digital Filter for Decimation and Interpolation, IEEE Journal of Solid-State Circuits, Vol. 29, No.6 R.Adams, (1994). Design aspects of high-order delta-sigma A/D converters, IEEE International Symposium on Circuits and Systems Tutorials, pp. 235-259. Sangil Park, (1990). Principles of Sigma-delta Modulation for Analog-to-Digital Converters, Motorola Inc, APR8/D Rev.1. Michael D. Ciletti (2003), Advanced Digital design with the Verilog HDL, Prentice Hall, Department of Electrical and Computer Engineering University of Colorado at Colorado Springs Y. Djadi and T. A. Kwasniewski, C. Chan and V. Szwarc, (1994). A high throughput Programmable Decimation and Interpolation Filter. Proceeding of International Conference on Signal Processing Applications and Technology, pp.1743-1748. |
| URI: | https://mpra.ub.uni-muenchen.de/id/eprint/41945 |
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