Paper 2024/1792
Towards Explainable Side-Channel Leakage: Unveiling the Secrets of Microarchitecture
Abstract
We explore the use of microbenchmarks, small assembly code snippets, to detect microarchitectural side-channel leakage in CPU implementations. Specifically, we investigate the effectiveness of microbenchmarks in diagnosing the predisposition to side-channel leaks in two commonly used RISC-V cores: Picorv32 and Ibex. We propose a new framework that involves diagnosing side-channel leaks, identifying leakage points, and constructing leakage profiles to understand the underlying causes. We apply our framework to several realistic case studies that test our framework for explaining side-channel leaks and showcase the subtle interaction of data via order-reducing leaks.
Metadata
- Available format(s)
-
PDF
- Category
- Implementation
- Publication info
- Preprint.
- Contact author(s)
-
stork @ riscure com
arora @ riscure com
chmiel @ fi muni cz
ileana buhan @ ru nl - History
- 2024-11-04: approved
- 2024-11-02: received
- See all versions
- Short URL
- https://ia.cr/2024/1792
- License
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CC BY
BibTeX
@misc{cryptoeprint:2024/1792,
author = {Ischa Stork and Vipul Arora and Łukasz Chmielewski and Ileana Buhan},
title = {Towards Explainable Side-Channel Leakage: Unveiling the Secrets of Microarchitecture},
howpublished = {Cryptology {ePrint} Archive, Paper 2024/1792},
year = {2024},
url = {https://eprint.iacr.org/2024/1792}
}