[go: up one dir, main page]
Wikipedia

Platform Controller Hub

The Platform Controller Hub (PCH) is a family of Intel's single-chip chipsets, first introduced in 2009. It is the successor to the Intel Hub Architecture, which used two chips–a northbridge and southbridge, and first appeared in the Intel 5 Series.

Block diagram of the Platform Controller Hub–based chipset architecture, including an Integrated Memory Controller (IMC) in the CPU
An Intel DH82H81 PCH with its die exposed

The PCH controls certain data paths and support functions used in conjunction with Intel CPUs. These include clocking (the system clock), Flexible Display Interface (FDI) and Direct Media Interface (DMI), although FDI is used only when the chipset is required to support a processor with integrated graphics. As such, I/O functions are reassigned between this new central hub and the CPU compared to the previous architecture: some northbridge functions, the memory controller and PCIe lanes, were integrated into the CPU while the PCH took over the remaining functions in addition to the traditional roles of the southbridge. AMD has its equivalent for the PCH, known simply as a chipset since the release of the Zen architecture in 2017.[1] AMD no longer uses its equivalent for the PCH, the Fusion controller hub (FCH).

Overview

edit
 
Intel Cannon Lake Platform Controller Hub die

The PCH architecture supersedes Intel's previous Hub Architecture, with its design addressing the eventual problematic performance bottleneck between the processor and the motherboard. Under the Hub Architecture, a motherboard would have a two piece chipset consisting of a northbridge chip and a southbridge chip. Over time, the speed of CPUs kept increasing but the bandwidth of the front-side bus (FSB) (connection between the CPU and the motherboard) did not, resulting in a performance bottleneck.[2]

As a solution to the bottleneck, several functions belonging to the traditional northbridge and southbridge chipsets were rearranged. The northbridge and its functions are now eliminated completely: The memory controller, PCI Express lanes for expansion cards and other northbridge functions are now incorporated into the CPU die as a system agent (Intel) or packaged in the processor on an I/O die (AMD Zen 2).

The PCH then incorporates a few of the remaining northbridge functions (e.g. clocking) in addition to all of the southbridge's functions, replacing it. The system clock was previously a connection to a dedicated chip but is now incorporated into the PCH. Two different connections exist between the PCH and the CPU: Flexible Display Interface (FDI) and Direct Media Interface (DMI). The FDI is used only when the chipset requires supporting a processor with integrated graphics. The Intel Management Engine was also moved to the PCH starting with the Nehalem processors and 5-Series chipsets. AMD's chipsets instead use several PCIe lanes to connect with the CPU while also providing their own PCIe lanes, which are also provided by the processor itself.[3][4] The chipset also contains the Nonvolatile BIOS memory.

With the northbridge functions integrated to the CPU, much of the bandwidth needed for chipsets is now relieved.

This style began in Nehalem and will remain for the foreseeable future, through Cannon Lake.

Phase-out

edit

Beginning with ultra-low-power Haswells and continuing with mobile Skylake processors, Intel incorporated the southbridge IO controllers into the CPU package, eliminating the PCH for a system in package (SOP) design with two dies; the larger die being the CPU die, the smaller die being the PCH die.[5] Rather than DMI, these SOPs directly expose PCIe lanes, as well as SATA, USB, and HDA lines from integrated controllers, and SPI/I²C/UART/GPIO lines for sensors. Like PCH-compatible CPUs, they continue to expose DisplayPort, RAM, and SMBus lines. However, a fully integrated voltage regulator will be absent until Cannon Lake.[needs update]

AMD's FCH has been discontinued since the release of the Carrizo series of CPUs as it has been integrated into the same die as the rest of the CPU.[6] However, since the release of the Zen architecture, there's still a component called a chipset which only handles relatively low speed I/O such as USB and SATA ports and connects to the CPU with a PCIe connection. In these systems all PCIe connections are routed directly to the CPU.[7] The UMI interface previously used by AMD for communicating with the FCH is replaced with a PCIe connection. Technically the processor can operate without a chipset; it only continues to be present for interfacing with low speed I/O.[8] AMD server and laptop CPUs adopt a self contained system on chip (SoC) design instead which doesn't require a chipset.[9][10][11]

Ibex Peak

edit
"Ibex Peak" redirects here. For the mountain in Canada, see Ibex Peak (British Columbia). For the mountain in Montana, see Ibex Peak (Montana).

The Intel 5 Series chipsets were the first to introduce a PCH. This first PCH is codenamed Ibex Peak.

This has the following variations:

Issues

edit
  • Bogus USB ports will be detected by desktop PCHs equipped with 6 USB ports (3420, H55) on the first EHCI controller. This can happen when AC power is removed after entering ACPI S4. Applying AC power back and resuming from S4 may result in non detected or even non functioning USB device (erratum 12)
  • Bogus USB ports will be detected by mobile PCH equipped with 6 USB ports (HM55) on the first EHCI controller. This can happen when AC power and battery are removed after entering ACPI S4. Applying AC power or battery back and resuming from S4 may result in non detected or even non functioning USB device (erratum 13)
  • Reading the HPET comparator timer immediately after a write returns the old value (erratum 14)
  • SATA 6 Gbit/s devices may not be detected at cold boot or after ACPI S3, S4 resume (erratum 21)

Langwell

edit

Langwell is the codename of a PCH in the Moorestown MID/smartphone platform.[12][13] for Atom Lincroft microprocessors.

This has the following variations:

  • AF82MP20 (PCH MP20)
  • AF82MP30 (PCH MP30)

Tiger Point

edit
 
Intel CG82NM10

Tiger Point is the codename of a PCH in the Pine Trail netbook platform chipset for Atom Pineview microprocessors.

This has the following variations:

Topcliff

edit

Topcliff is the codename of a PCH in the Queens Bay embedded platform chipset for Atom Tunnel Creek microprocessors.

It connects to the processor via PCIe (vs. DMI as other PCHs do).

This has the following variations:

Cougar Point

edit
See also: LGA 1155 § Original Sandy Bridge chipsets, and List of Intel chipsets § LGA 1155

Cougar Point is the codename of a PCH in Intel 6 Series chipsets for mobile, desktop, and workstation / server platforms. It is most closely associated with Sandy Bridge processors.

This has the following variations:

Issues

edit

In the first month after Cougar Point's release, January 2011, Intel posted a press release stating a design error had been discovered. Specifically, a transistor in the 3 Gbit/s PLL clocking tree was receiving too high voltage. The projected result was a 5–15% failure rate within three years of 3 Gbit/s SATA ports, commonly used for storage devices such as hard drives and optical drives. The bug was present in revision B2 of the chipsets, and was fixed with B3. Z68 did not have this bug, since the B2 revision for it was never released. 6 Gbit/s ports were not affected. This bug was especially a problem with the H61 chipset, which only had 3 Gbit/s SATA ports. Through OEMs, Intel plans to repair or replace all affected products at a cost of $700 million.[14][15]

Nearly all produced motherboards using Cougar Point chipsets were designed to handle Sandy Bridge, and later Ivy Bridge, processors. ASRock produced one motherboard for LGA 1156 processors, based on P67 chipset, the P67 Transformer. It exclusively supports Lynnfield Core i5/i7 and Xeon processors, using LGA 1156 socket. After revision B2 of Cougar Point chipsets was recalled, ASRock decided not to update the P67 Transformer motherboard, and was discontinued. Some small Chinese manufacturers are producing LGA 1156 motherboards with H61 chipset.

Whitney Point

edit

Whitney Point is the codename of a PCH in the Oak Trail tablet platform for Atom Lincroft microprocessors.

This has the following variations:

Panther Point

edit
See also: LGA 1155 § Ivy Bridge chipsets
 
intel BD82HM77 PCH Panther Point

Panther Point is the codename of a PCH in Intel 7 Series chipsets for mobile and desktop. It is most closely associated with Ivy Bridge processors. These chipsets (except PCH HM75) have integrated USB 3.0.[16]

This has the following variations:

Cave Creek

edit

Cave Creek is the codename of the PCH most closely associated with Crystal Forest platforms and Gladden[17] or Sandy Bridge-EP/EN[18] processors.

  • DH8900 (PCH 8900) Communications
  • DH8903 (PCH 8903) Communications
  • DH8910 (PCH 8910) Communications
  • DH8920 (PCH 8920) Communications

Patsburg

edit

Patsburg is the codename of a PCH in Intel 7 Series chipsets for server and workstation using the LGA 2011 socket. It was initially launched in 2011 as part of Intel X79 for the desktop enthusiast Sandy Bridge-E processors in Waimea Bay platforms.[19] Patsburg was then used for the Sandy Bridge-EP server platform (the platform was codenamed Romley and the CPUs codenamed Jaketown, and finally branded as Xeon E5-2600 series) launched in early 2012.[20]

Launched in the fall of 2013, the Ivy Bridge-E/EP processors (the latter branded as Xeon E5-2600 v2 series) also work with Patsburg, typically with a BIOS update.[21][22]

Patsburg has the following variations:

Coleto Creek

edit

Coleto Creek is the codename of the PCH most closely associated with Highland Forest platforms and Ivy Bridge-EP[23] processors.

  • DH8925 (PCH 8925) Communications
  • DH8926 (PCH 8926) Communications
  • DH8950 (PCH 8950) Communications
  • DH8955 (PCH 8955) Communications

Lynx Point

edit
See also: LGA 1150 § Haswell chipsets
"Lynx Point" redirects here. For the cat coloration, see Point coloration.

Lynx Point is the codename of a PCH in Intel 8 Series chipsets, most closely associated with Haswell processors with LGA 1150 socket.[24] The Lynx Point chipset connects to the processor primarily over the Direct Media Interface (DMI) interface.[25]

The following variants are available:[26]

In addition the following newer variants are available, additionally known as Wildcat Point, which also support Haswell Refresh processors:[27]

  • DH82H97 (PCH H97) Desktop Home
  • DH82Z97 (PCH Z97) Combined desktop base and home

Issues

edit

A design flaw causes devices connected to the Lynx Point's integrated USB 3.0 controller to be disconnected when the system wakes up from the S3 state (Suspend to RAM), forcing the USB devices to be reconnected although no data is lost.[28][29] This issue is corrected in C2 stepping level of the Lynx Point chipset.[30]

Wellsburg

edit

Wellsburg is the codename for the C610-series PCH, supporting the Haswell-E (Core i7 Extreme), Haswell-EP (Xeon E5-16xx v3 and Xeon E5-26xx v3), and Broadwell-EP (Xeon E5-26xx v4) processors. Generally similar to Patsburg, Wellsburg consumes only up to 7 W when fully loaded.[31]

Wellsburg has the following variations:

Sunrise Point

edit
See also: LGA 1151 § Skylake chipsets

Sunrise Point is the codename of a PCH in Intel 100 Series chipsets, most closely associated with Skylake processors with LGA 1151 socket.

The following variants are available:[32]

  • GL82C236 (PCH C236) Workstation/Server
  • GL82H110 (PCH H110) Desktop Home
  • GL82H170 (PCH H170) Desktop Home (Note the datasheet linked one that page is incorrect, see via PCH HM170 below)
  • GL82Z170 (PCH Z170) Combined desktop base and home
  • GL82B150 (PCH B150) Desktop Office
  • GL82Q150 (PCH Q150) Desktop Office
  • GL82Q170 (PCH Q170) Desktop Office
  • GL82HM170 (PCH HM170) Mobile Home
  • GL82CM236 (PCH CM236) Mobile Workstation
  • GL82QM170 (PCH QM170) Mobile Office

Union Point

edit
See also: LGA 1151 § Kaby Lake chipsets

Union Point is the codename of a PCH in Intel 200 Series chipsets, most closely associated with Kaby Lake processors with LGA 1151 socket.

The following variants are available:[33]

Lewisburg

edit

Lewisburg is the codename for the C620-series PCH, supporting LGA 2066 socketed Skylake-X/Kaby Lake-X processors ("Skylake-W" Xeon).

Lewisburg has the following variations:

  • EY82C621 (PCH C621), intended for servers and workstations
  • EY82C622 (PCH C622), intended for servers and workstations
  • EY82C624 (PCH C624), intended for servers and workstations
  • EY82C625 (PCH C625), intended for servers and workstations
  • EY82C626 (PCH C626), intended for servers and workstations
  • EY82C627 (PCH C627), intended for servers and workstations
  • EY82C628 (PCH C628), intended for servers and workstations

Basin Falls

edit

Basin Falls is the codename for the C400-series PCH, supporting Skylake-X/Kaby Lake-X processors (branded Core i9 Extreme and "Skylake-W" Xeon). Generally similar to Wellsburg, Basin Falls consumes only up to 6 W when fully loaded.

Basin Falls has the following variations:

Cannon Point

edit
See also: LGA 1151 § Coffee Lake chipsets (300 series)

Cannon Point is the codename of a PCH in Intel 300 Series chipsets, most closely associated with Coffee Lake processors with LGA 1151 socket.[34]

The following variants are available:[35]

Comet Lake PCH

edit

Rocket Lake PCH

edit

Alder Lake PCH

edit
See also: Alder Lake chipsets (600 series)

Raptor Lake PCH

edit
See also: Raptor Lake chipsets (700 series)

See also

edit

References

edit
  1. ^ Burke, Steve (2018-06-01). "What is a Chipset? AMD vs. Intel (Z390 vs. Z490, etc.)". GamersNexus.net. Archived from the original on August 29, 2019. Retrieved 2020-08-09.
  2. ^ Hook, Brian (17 September 2003). "Breaking the Speed Barrier: The Frontside Bus Bottleneck". Technewsworld. Retrieved 1 February 2016.
  3. ^ Bonshor, Gavin. "The AMD TRX40 Motherboard Overview: 12 New Motherboards Analyzed". www.anandtech.com.
  4. ^ Burke, Steve. "AMD X570 vs. X470, X370 Chipset Comparison, Lanes, Specs, & Differences". www.gamersnexus.net.
  5. ^ Cutress, Ian. "Intel Releases Broadwell-U: New SKUs, up to 48 EUs and Iris 6100". www.anandtech.com.
  6. ^ "AMD at ISSCC 2015: Carrizo and Excavator Details".
  7. ^ "AMD Zen 4 Ryzen 9 7950X and Ryzen 5 7600X Review: Retaking the High-End".
  8. ^ "The AMD Zen and Ryzen 7 Review: A Deep Dive on 1800X, 1700X and 1700".
  9. ^ "4th Gen AMD EPYC Processor Architecture" (PDF). AMD. Retrieved 2024-11-03.
  10. ^ Kennedy, Patrick (2019-04-08). "Supermicro M11SDV-4C-LN4F Review mITX AMD EPYC 3151 Platform". ServeTheHome. Retrieved 2024-08-18.
  11. ^ Cutress, Andrei Frumusanu, Dr Ian. "AMD 3rd Gen EPYC Milan Review: A Peak vs Per Core Performance Balance". www.anandtech.com. Retrieved 2024-08-18.{{cite web}}: CS1 maint: multiple names: authors list (link)
  12. ^ Langwell Background Information, Intel, archived from the original on 2012-07-09, retrieved 2010-08-03
  13. ^ New Intel Atom Processor-Based Platform Using Significantly Lower Power Readies Intel for Smartphone, Tablet Push, Intel, May 4, 2010, retrieved 2010-07-27
  14. ^ Intel Identifies Chipset Design Error, Implementing Solution, Intel, 31 January 2011
  15. ^ The Source of Intel's Cougar Point SATA Bug, AnandTech, 31 January 2011
  16. ^ "Correction: Ivy Bridge and Thunderbolt - Featured, not Integrated". AnandTech. Retrieved 2014-01-21.
  17. ^ "Intel Xeon/Core/Pentium/Celeron, Communications Chipset 89xx". Intel. 2014-01-13. Retrieved 2014-01-21.
  18. ^ "Intel Xeon Processor E5-2600/E5-2400/Communications Chipset 89xx". Ssl.intel.com. Retrieved 2014-01-21.
  19. ^ "A Look Into Intel's Next Gen Enthusiast Platform : Sandy Bridge E & Waimea Bay", vr-zone.com, April 15, 2010, archived from the original on April 23, 2010, retrieved 2010-07-27
  20. ^ "Intel plugs both your sockets with 'Jaketown' Xeon E5-2600s • The Channel". Channelregister.co.uk. 2012-03-06. Retrieved 2014-01-21.
  21. ^ "Ivy Bridge-E Not a Cut-down 8-core, 20 MB LLC Die". techPowerUp.com. 2013-08-12. Retrieved 2014-01-21.
  22. ^ "Intel carves up Xeon E5-2600 v2 chips for two-socket boxes". www.theregister.com.
  23. ^ "Intel Announces Highland Forest, a New Platform that will Accelerate Network Transformation". Intel. 2013-12-04. Retrieved 2014-08-09.
  24. ^ Shawn Knight (2012-11-13). "Leaked Intel slides detail Haswell's Lynx Point chipset". techspot.com. Retrieved 2013-10-30.
  25. ^ "Intel "Lynx Point" 8-series Chipset Detailed, Completely SATA 6 Gbit/s". techpowerup.com. 2012-02-17. Retrieved 2013-10-30.
  26. ^ "Products (Formerly Lynx Point)". Intel. Retrieved 2013-10-30.
  27. ^ Andrew Cunningham (2014-05-11). "New Intel chipsets speed up your storage, but they're missing new CPUs". arstechnica.com. Retrieved 2014-05-13.
  28. ^ "Lynx Point USB 3.0 Controller Issue Correction Needs New Hardware". techpowerup.com. 2013-03-11. Retrieved 2013-10-30.
  29. ^ Frank Everaardt (2013-03-01). "USB 3.0 problems for Intel's Haswell". hardware.info. Retrieved 2013-10-30.
  30. ^ "Haswell C2 stepping availability". arstechnica.com. 2013. Retrieved 2013-10-30.
  31. ^ "Intel Readies 18-Core Xeon "Broadwell-EP" Microprocessors for Launch in 2015 – Report". xbitlabs.com. Archived from the original on 2013-12-24. Retrieved 2014-01-21.
  32. ^ "Products (Formerly Skylake)". Intel. Retrieved 2015-10-24.
  33. ^ "Products (Formerly Kaby Lake)". Intel. Retrieved 2017-08-18.
  34. ^ Shilov, Anton (April 26, 2018). "Intel Outs Z390 & X399 PCHs for Cannon Lake & Coffee Lake CPUs". AnandTech. Retrieved 2018-06-29.
  35. ^ "Products (Formerly Coffee Lake)". Intel. Retrieved 2018-06-29.
Retrieved from "https://en.wikipedia.org/w/index.php?title=Platform_Controller_Hub&oldid=1262772688"