NXP LPC

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LPC (Low Pin Count) is a family of 32-bit microcontroller integrated circuits by NXP Semiconductors (formerly Philips Semiconductors).^[1] The LPC chips are grouped into related series that are based around the same 32-bit ARM processor core, such as the Cortex-M4F, Cortex-M3, Cortex-M0+, or Cortex-M0. Internally, each microcontroller consists of the processor core, static RAM memory, flash memory, debugging interface, and various peripherals. The earliest LPC series were based on the Intel 8-bit 80C51 core.^[2] As of February 2011, NXP had shipped over one billion ARM processor-based chips.^[3]

All recent LPC families are based on ARM cores, which NXP Semiconductors licenses from ARM Holdings, then adds their own peripherals before converting the design into a silicon die. NXP is the only vendor shipping an ARM Cortex-M core in a dual in-line package: LPC810 in DIP8 (0.3-inch width) and LPC1114 in DIP28 (0.6-inch width). The following tables summarize the NXP LPC microcontroller families.

• In 1982, Philips Semiconductors invented the I²C-bus, and is currently the top supplier of I²C solutions in the world.^[11]
• In January 2005, Philips Semiconductors launched the PNX4008 'Nexperia™ Mobile Multimedia Processor', featuring an ARM9 processor and including PowerVR MBX graphics IP from Imagination Technologies.
• In February 2005, Philips Semiconductors announces the LPC3000 ARM9 series, based on the Nexperia platform.^[12]
• In September 2006, Philips Semiconductors was spun off to a consortium of private equity investors and changed its name to NXP.^[1] As part of this spin off, NXP acquired the older Philips LPC microcontroller families.
• In September 2006, NXP announced the LPC2300 and LPC2400 ARM7 series.^[13]
• In September 2007, NXP announced the LPC2900 series.^[14]
• In February 2008, NXP announced the licensing of the ARM Cortex-M3 core from ARM Holdings.^[15]
• In March 2008, NXP announced the LPC3200 ARM9 series.^[16]
• In October 2008, NXP announced the LPC1700 series.^[17]
• In February 2009, NXP announced the licensing of the ARM Cortex-M0 core from ARM Holdings.^[18]
• In May 2009, NXP announced the LPC1300 series.^[19]
• In January 2010, NXP launched the LPCXpresso Toolchain for NXP ARM processors.^[20]
• In February 2010, NXP announced the licensing of the ARM Cortex-M4F core from ARM Holdings.^[21]
• In April 2010, NXP announced the LPC1102, the world’s smallest ARM microcontroller at 2.17 mm x 2.32 mm size.^[22]
• In September 2010, NXP announced the LPC1800 series.^[23]
• In February 2011, NXP announced the LPC1200 series.^[24]
• In April 2011, NXP announced the LPC11U00 series with USB.^[25]
• In September 2011, NXP announced the LPC11D00 series with a LCD controller.^[26]
• In December 2011, NXP announced the LPC4300 series, the first dual-core chip with an ARM Cortex-M4F and ARM Cortex-M0.^[27]
• In February 2012, NXP announced the LPC1100LV series with dual supply voltage to allow interfacing to both 1.8 V and 3.3 V peripherals.^[28]
• In March 2012, NXP announced the LPC1100XL series for extra low-power and LPC11E00 series with EEPROM.^[29]
• In March 2012, NXP announced the licensing of the ARM Cortex-M0+ core from ARM Holdings.^[30]
• In March 2012, NXP introduced a "longevity program" to promise availability of IC chips from select ARM families for 10 or more years.^[31]
• In March 2012, NXP announced the LPC11A00 series with flexible analog subsystem.^[32]
• In April 2012, NXP announced the LPC11C00 series with a CAN bus controller.^[33]
• In September 2012, NXP announced the LPC4000 series based on ARM Cortex-M4F.^[34]
• In November 2012, NXP announced the LPC800 series based on the ARM Cortex-M0+ core, and the first ARM Cortex-M in a DIP8 package.^[35]
• In April 2013, NXP announced the LPC-Link 2 JTAG / SWD debug adapter. Multiple firmware versions are available to emulate popular debug adapters.^[36][37]
• In May 2013, NXP announced that it acquired Code Red Technologies, an embedded software development tools provider, such as the LPCXpresso IDE and Red Suite.^[38][39]
• In October 2013, NXP announced the LPC4370 microcontroller.^[40]
• In December 2013, NXP announced the LPC11E37H and the LPC11U37H microcontrollers.^[41]
• In January 2017, NXP announced LPC54000 MCU series along with a refresh of the LPC800 series.^[42]

LPC4000 Family^[43]

General information
Launched	Current
Performance
Max. CPU clock rate	120  to 204 MHz
Architecture and classification
Microarchitecture	ARM Cortex-M4F[4] ARM Cortex-M0[6]
Instruction set	Thumb, Thumb-2, Sat Math, DSP, FPU

The LPC4xxx series are based on the ARM Cortex-M4F core.

The LPC4300 series have two or three ARM cores, one ARM Cortex-M4F and one or two ARM Cortex-M0. The LPC4350 chips are pin-compatible with the LPC1850 chips. The LPC4330-Xplorer development board is available from NXP. The summary for this series is:^[27][44][45]

• Core:
  • ARM Cortex-M4F and one or two ARM Cortex-M0 core at a maximum clock rate of 204 MHz.
  • Debug interface is JTAG or SWD with SWO "Serial Trace", eight breakpoints and four watch points. JTAG supports both cores, but SWD only supports Cortex-M4F core.
• Memory:
  • Static RAM sizes of 104 / 136 / 168 / 200 / 264 KB.
  • Flash sizes of 0 / 512 / 768 / 1024 KB.
  • EEPROM size of 16 KB.
  • ROM size of 64 KB, which contains a boot loader with optional booting from USART0 / USART3, USB0 / USB1, SPI Flash, Quad SPI Flash, external 8 / 16/ 32-bit NOR flash. The ROM also contains an API for in-system programming, in-application programming, OTP programming, USB device stack for HID / MSC / DFU.
  • OTP size of 64 bits.
  • Each chip has a factory-programmed 128-bit unique device identifier number.
• Peripherals:
  • four UART, two I²C, one SPI, two CAN, none / one / two high-speed USB 2.0 Host/Device controller (one is OTG capable), none or one Ethernet controller, none or one LCD controller, interface for SDRAM, and more.
• Oscillators consists of optional external 1 to 25 MHz crystal or oscillator, external 32.768 kHz crystal for RTC, internal 12 MHz oscillator, and three internal PLLs for CPU / USB / Audio.
• IC packages: LQFP100, TFBGA100, LQFP144, TFBGA180, LQFP208, LBGA256.
• Operating voltage range is 2.2 to 3.6 volt.

The LPC4000 series are based on the single ARM Cortex-M4F processor core. The LPC408x chips are pin-compatible with the LPC178x chips. The summary for this series is:^[34][46]

• Core:
  • ARM Cortex-M4F core at a maximum clock rate of 120 MHz.
  • Debug interface is JTAG or SWD with SWO "Serial Trace", eight breakpoints and four watch points.
• Memory:
  • Static RAM sizes of 24 / 40 / 80 / 96 KB.
  • Flash sizes of 64 / 128 / 256 / 512 KB.
  • EEPROM sizes of 2 / 4 KB.
  • ROM boot loader.
  • Each chip has a factory-programmed 128-bit unique device identifier number.
• Peripherals:
  • four or five UART, three I²C, one high-speed USB 2.0 Device controller or Host / Device / OTG controller, none or one Ethernet controller, none or one LCD controller, and more.
• Oscillators consists of optional external 1 to 25 MHz crystal or oscillator, external 32.768 kHz crystal for RTC, internal 12 MHz oscillator, and two internal PLLs for CPU and USB.
• IC packages: LQFP80, LQFP144, TFBGA180, LQFP208, TFBGA208.
• Operating voltage range is 2.4 to 3.6 volt.

LPC3000 Family^[47]

General information
Launched	Current
Max. CPU clock rate	to 266 MHz
Architecture and classification
Microarchitecture	ARM9
Instruction set	Thumb, ARM

The LPC3xxx series use the ARM926EJ-S core, and were based on the Nexperia SoC platform. Was the first 90 nm ARM9 MCU processor family.^[48]

The LPC3200 series are based on the ARM926EJ-S processor core.^[16][49]

The LPC3100 series are based on the ARM926EJ-S processor core.^[50] The LPC3154 is used by NXP to implement the LPC-Link debugger on all LPCXpresso boards.^[51][52] The LPC3180 core operates up to 208 MHz, and features interfaces for SDRAM, USB 2.0 full-speed, NAND flash, Secure Digital (SD) and I²C.^{[citation needed]}

LPC2000 Family^[47][53]

General information
Launched	Current
Max. CPU clock rate	to 72 MHz
Architecture and classification
Microarchitecture	ARM7, ARM9
Instruction set	Thumb, ARM

LPC2000 is a series based on a 1.8-volt ARM7TDMI-S core operating at up to 80 MHz together with a variety of peripherals including serial interfaces, 10-bit ADC/DAC, timers, capture compare, PWM, USB interface, and external bus options. Flash memory ranges from 32 kB to 512 kB; RAM ranges from 4 kB to 96 kB.^{[citation needed]}

NXP has two related series without the LPC name, the LH7 series are based on the ARM7TDMI-S and ARM720T cores,^[54] and the LH7A series are based on the ARM9TDMI core.^[55]

The LPC2900 series are based on the ARM968E-S processor core.^[14][56]

The LPC2400 series are based on the ARM7TDMI-S processor core.^[13][57]

The LPC2300 series are based on the ARM7TDMI-S processor core.^[13][58] The LPC2364/66/68 and the LPC2378 are full-speed USB 2.0 devices with 2 CAN interfaces and 10/100 Ethernet MAC in LQFP100 and LQFP144 packages. Multiple peripherals are supported including a 10-bit 8-channel ADC and a 10-bit DAC.^{[citation needed]}

The LPC2200 series are based on the ARM7TDMI-S processor core.^[59]

The LPC2100 series are based on the ARM7TDMI-S processor core.^[60] The LPC2141, LPC2142, LPC2144, LPC2146, and LPC2148 are full-speed USB 2.0 devices in LQFP64 packages. Multiple peripherals are supported including one or two 10-bit ADCs and an optional 10-bit DAC.^{[citation needed]}

LPC1000 Family^[61][62]

General information
Launched	Current
Performance
Max. CPU clock rate	30  to 180 MHz
Architecture and classification
Microarchitecture	ARM Cortex-M3[5] ARM Cortex-M0[6]
Instruction set	Thumb, Thumb-2

The NXP LPC1000 family consists of six series of microcontrollers: LPC1800, LPC1700, LPC1500, LPC1300, LPC1200, LPC1100. The LPC1800, LPC1700, LPC1500, LPC1300 series are based on the Cortex-M3 ARM processor core.^[61] The LPC1200 and LPC1100 are based on the Cortex-M0 ARM processor core.^[62]

The NXP LPC1800-series are based on the ARM Cortex-M3 core.^[23][63] The LPC1850 is pin-compatible with the LPC4350 parts. The available packages are TBGA100, LQFP144, BGA180, LQFP208, BGA256. The LPC4330-Xplorer development board is available from NXP.

The Apple M7 and M8 motion co-processor chips are most likely based on the LPC1800 series, as LPC18A1 and LPC18B1.

The NXP LPC1700-series are based on the ARM Cortex-M3 core.^[17][64] The LPC178x is pin-compatible with the LPC408x parts. The available packages are LQFP80, LQFP100, TFBGA100, LQFP144, TFBGA180, LQFP208, TFBGA208. The LPC1769-LPCXpresso development board is available from NXP. The mbed LPC1768 board is also available. With EmCrafts LPC-LNX-EVB a LPC1788 based board with μClinux is available.^[65]

The NXP LPC1500-series are based on the ARM Cortex-M3 core.^[66] The available packages are LQFP48, LQFP64, LQFP100. The LPC1549-LPCXpresso development board is available from NXP along with a motor control kit.

The NXP LPC1300-series are based on the ARM Cortex-M3 core.^[19][67] The available packages are HVQFN33, LQFP48, LQFP64. The LPC1343-LPCXpresso and LPC1347-LPCXpresso development board are available from NXP.

The NXP LPC1200-family are based on the ARM Cortex-M0 core. It consists of 2 series: LPC1200, LPC12D00.^[24][68][69] The available packages are LQFP48, LQFP64, LQFP100. The LPC1227-LPCXpresso development board is available from NXP.

The NXP LPC1100-family are based on the ARM Cortex-M0 core. It consists of 8 series: LPC1100 Miniature, LPC1100(X)L, LPC1100LV, LPC11A00, LPC11C00, LPC11D00, LPC11E00, LPC11U00.

The LPC1100 series primarily targets an ultra tiny footprint. The available package is WLCSP16 (2.17 mm x 2.32 mm).^[22][70] The LPC1104-LPCXpresso development board is available from NXP.

The LPC1100(X)L-series consists of three subseries: LPC111x, LPC111xL, and LPC111xXL. The LPC111xL and LPC111xXL include the power profiles, a windowed watchdog timer, and a configurable open-drain mode. The LPC1110XL adds a Non-Maskable Interrupt (NMI) and 256-byte page flash erase function. The LPC1114-LPCXpresso and LPC1115-LPCXpresso development board are available from NXP. The summary for these series are:^[29][71]

• Core:
  • ARM Cortex-M0 core at a maximum clock rate of 50 MHz.
  • Includes 24-bit SysTick Timer.
  • Debug interface is SWD with four breakpoints and two watchpoints. JTAG debugging is not supported.
• Memory:
  • Static RAM sizes of 1 / 2 / 4 / 8 KB general purpose.
  • Flash sizes of 4 / 8 / 16 / 24 / 32 / 64 KB general purpose.
  • ROM boot loader.
  • Each chip has a factory-programmed 128-bit unique device identifier number.
• Peripherals:
  • LPC111x has one UART, one I²C, one or two SPI, two 16-bit timers, two 32-bit timers, watch dog timer, five to eight multiplexed 10-bit ADC, 14 to 42 GPIO.
    • I²C supports standard mode (100 kHz) / fast-mode (400 kHz) / fast-mode Plus (1 MHz) speeds, master / slave / snooping modes, multiple slave addresses.
  • LPC111xL consists of LPC111x features, plus low power profile in active and sleep modes, internal pull-up resistors to pull-up pins to full VDD level, programmable pseudo open-drain mode for GPIO pins, upgraded to windowed watch dog timer with clock source lock capability.
  • LPC111xXL consists of LPC1110L features, plus flash page erase In-Application Programming (IAP) function, timers / UART / SSP peripherals available on more pins, one capture feature added to each timer, capture-clear feature on 16-bit and 32-bit timers for pulse-width measurements.
• Oscillators consists of optional external 1 to 25 MHz crystal or oscillator, internal 12 MHz oscillator, internal programmable 9.3 kHz to 2.3 MHz watchdog oscillator, and one internal PLL for CPU.
• IC packages:
  • LPC111x and LPC111xXL in HVQFN33, LQFP48.
  • LPC111xL in SO20, TSSOP20, TSSOP28, DIP28 (0.6-inch width), HVQFN24, HVQFN33, LQFP48. NXP is the only vendor shipping ARM Cortex-M cores in DIP packages.
• Operating voltage range is 1.8 to 3.6 volt.

The LPC1100LV series primarily targets a low operating voltage range of 1.65 to 1.95 volt power. Its I²C is limited to 400 kHz. It is available in two power supply options: A 1.8 volt single power supply (WLCSP25 and HVQFN24 packages), or 1.8 volt (core) / 3.3 volt (IO/analog) dual power supply with 5 volt tolerant I/O (HVQFN33 package). The available packages are WLCSP25 (2.17 mm × 2.32 mm), HVQFN24 and HVQFN33.^[28][72]

The LPC11A00 series primarily targets analog features, such as: 10-bit ADC, 10-bit DAC, analog comparators, analog voltage reference, temperature sensor, EEPROM memory. The available packages are WLCSP20 (2.5 mm x 2.5 mm), HVQFN33 (5 mm x 5 mm), HVQFN33 (7 mm x 7 mm), LQFP48.^[32][73]

The LPC11C00 series primarily targets CAN bus features, such as: one MCAN controller, and the LPC11C22 and LPC11C24 parts include an on-chip high-speed CAN transceiver. The available package is LQFP48.^[33][74] The LPC11C24-LPCXpresso development board is available from NXP.

The LPC11D00 series primarily targets LCD display features, such as: 4 x 40 segment LCD driver. The available package is LQFP100.^[26][75]

The LPC11E00 series primarily targets EEPROM memory and Smart Card features.^[29][76]

The LPC11U00 series primarily targets USB features, such as: USB 2.0 full-speed controller. It's the first Cortex-M0 with integrated drivers in ROM. This series is pin-compatible with the LPC134x series.^[25][77] The LPC11U14-LPCXpresso development board is available from NXP. The mbed LPC11U24 board is also available.

LPC800 Family ^[78]

General information
Launched	2012
Discontinued	Current
Performance
Max. CPU clock rate	30 MHz
Architecture and classification
Microarchitecture	ARM Cortex-M0+[7]
Instruction set	Thumb subset, Thumb-2 subset

The NXP LPC800 microcontroller family are based on the Cortex-M0+ ARM processor core. Unique features include a pin switch matrix, state configurable timer, clockless wake-up controller, single-cycle GPIO, DIP8 package. The LPC812-LPCXpresso development board is available from NXP. The summary for this series is:^[35][79][80]

• Core:
  • ARM Cortex-M0+ core at a maximum clock rate of 30 MHz.
  • Includes a single-cycle 32x32 bit multiplier, 24-bit SysTick Timer, Vector Table Relocation, full NVIC with 32 interrupts and four levels of priorities, single-cycle GPIO.
  • Doesn't include a memory protection unit (MPU), nor a wake-up interrupt controller (WIC). Instead NXP added their own clockless wake-up controller to lower power usage.
  • The debug interface is SWD with four breakpoints, two watchpoints, 1 KB Micro Trace Buffer (MTB). JTAG debugging is not supported.
• Memory:
  • Static RAM sizes of 1 / 2 / 4 KB general purpose.
  • Flash sizes of 4 / 8 / 16 KB general purpose, zero wait-state up to 20 MHz, one wait-state up to 30 MHz.
  • ROM size of 8 KB, which contains a boot loader with optional booting from USART. The ROM also contains an API for USART communication, I²C communication, flash programming, in-system programming, and power profile.
  • Each chip has a factory-programmed 128-bit unique device identifier number.
• Peripherals:
  • One to three USARTs, one I²C, one or two SPI, one analog comparator, four interrupt timers, state configurable timer, wake-up timer, windowed watchdog timer, 6 to 18 single-cycle GPIOs, cyclic redundancy check (CRC) engine, pin switch matrix, four low-power modes, brownout detect.
  • I²C supports standard mode (100 kHz) / fast-mode (400 kHz) / fast-mode Plus (1 MHz) speeds, master / slave / snooping modes, multiple slave addresses.
• Oscillators consists of optional external 1 to 25 MHz crystal or oscillator, internal 12 MHz oscillator, internal programmable 9.3 kHz to 2.3 MHz watchdog oscillator, and one internal PLL for CPU.
• IC packages are DIP8 (0.3-inch width), TSSOP16, TSSOP20, SO20. NXP is the only vendor shipping ARM Cortex-M cores in DIP packages.
• Operating voltage range is 1.8 to 3.6 volt.

The LPC900 series are legacy devices based on the 8-bit 80C51 processor core.^[81]

The LPC700 series are legacy devices based on the 8-bit 80C51 processor core.^[82]

LPCXpresso boards are sold by NXP to provide a quick and easy way for engineers to evaluate their microcontroller chips.^[83][84] The LPCXpresso boards are jointly developed by NXP, Code Red Technologies,^[38] and Embedded Artists.^[20]

Each LPCXpresso board has the following common features:

• On-board LPC-LINK for programming and debugging via a MiniUSB connector.
• Board can be cut into two separate boards: LPC-LINK board and target microcontroller board.
• Power input from 5 V via the USB cable or 5 V external power. If boards are separated, then 3.3 V external power is required for the target microcontroller board.
• Target microcontroller side:
  • User LED.
  • 12 MHz crystal.
  • Prototype area.
  • Holes for JTAG/SWD debugger connection.
  • DIP footprint compatible with mbed boards.

Flash programming via UART

All LPC microcontrollers have a ROM'ed bootloader that supports loading a binary image into its flash memory using one or more peripherals (varies by family). Since all LPC bootloaders support loading from the UART peripheral and most boards connect a UART to RS-232 or a USB-to-UART adapter IC, thus it's a universal method to program the LPC microcontrollers. Some microcontrollers requires the target board to have a way to enable/disable booting from the ROM'ed bootloader (i.e. jumper / switch / button).

• lpc21isp A multi-platform open-source tool to flash LPC microcontrollers over the UART.
• Flash Magic, a commercial program for Windows and macOS to perform in-system programming of the LPC flash via its UART.
• nxp_isp_loader, an open-source tool to flash LPC microcontrollers over the UART.

Debugging tools (JTAG / SWD)

• OpenOCD, an open source software package for JTAG access using a wide variety of hardware adapters.
• LPC-Link 2, by NXP, a JTAG / SWD debug adapter that has multiple firmware releases available to emulate popular debug adapter protocols, such as: J-Link by Segger, CMSIS-DAP by ARM, Redlink by Code Red Technologies. All connectors are 1.27 mm (0.05-inch) pitch.^[36][37]

The amount of documentation for all ARM chips is daunting, especially for newcomers. The documentation for microcontrollers from past decades would easily be inclusive in a single document, but as chips have evolved so has the documentation grown. The total documentation is especially hard to grasp for all ARM chips since it consists of documents from the IC manufacturer (NXP Semiconductors) and documents from CPU core vendor (ARM Holdings).

A typical top-down documentation tree is: manufacturer website, manufacturer marketing slides, manufacturer datasheet for the exact physical chip, manufacturer detailed reference manual that describes common peripherals and aspects of a physical chip family, ARM core generic user guide, ARM core technical reference manual, ARM architecture reference manual that describes the instruction set(s).

NXP documentation tree (top to bottom)

1. NXP website.
2. NXP marketing slides.
3. NXP datasheet.
4. NXP reference manual.
5. ARM core website.
6. ARM core generic user guide.
7. ARM core technical reference manual.
8. ARM architecture reference manual.

NXP has additional documents, such as: evaluation board user manuals, application notes, getting started guides, software library documents, errata, and more. See External Links section for links to official NXP and ARM documents.

• ARM architecture, List of ARM microprocessor cores, ARM Cortex-M
• Microcontroller, List of common microcontrollers
• Embedded system, Single-board microcontroller
• Interrupt, Interrupt handler, Comparison of real-time operating systems
• JTAG, SWD

NXP LPC Official Documents

• NXP LPC official website
• LPCware

ARM Official Documents

LPC2000

• LPC2000 Forum, LPC2000 Info

LPC1000

• LPC1000 Forum
• Articles: 1, 2, 3, 4

LPC800

• Articles: 1, 2, 3
• Switch Matrix: 1, 2, 3
• J-Link: 1