default search action

combined dblp search
author search
venue search
publication search

ask others

"Adaptive Clock Management of HLS-generated Circuits on FPGAs."

Kahlan Gibson et al. (2022)

> Home

Details and statistics

DOI: 10.1145/3520140

access: closed

type: Journal Article

metadata version: 2023-01-15

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/trets/GibsonRNW22
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/trets/GibsonRNW22
Kahlan Gibson, Esther Roorda, Daniel Holanda Noronha, Steven J. E. Wilton:
Adaptive Clock Management of HLS-generated Circuits on FPGAs. ACM Trans. Reconfigurable Technol. Syst. 15(4): 49:1-49:32 (2022)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.