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"A Binary Line Buffer Circuit Featuring Lossy Data Compression at Fixed ..."

Ettore Napoli et al. (2020)

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DOI: 10.1109/TCSI.2019.2941703

access: closed

type: Journal Article

metadata version: 2020-05-22

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  - https://dblp.org/rec/journals/tcas/NapoliCPS20
Ettore Napoli, Davide De Caro, Nicola Petra, Antonio Giuseppe Maria Strollo:
A Binary Line Buffer Circuit Featuring Lossy Data Compression at Fixed Maximum Data Rate. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(1): 121-134 (2020)

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