default search action

combined dblp search
author search
venue search
publication search

ask others

"A 4-to-10.5 Gb/s Continuous-Rate Digital Clock and Data Recovery With ..."

Guanghua Shu et al. (2016)

> Home

Details and statistics

DOI: 10.1109/JSSC.2015.2497963

access: closed

type: Journal Article

metadata version: 2020-08-30

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/ShuCSTAEEH16
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/ShuCSTAEEH16
Guanghua Shu, Woo-Seok Choi, Saurabh Saxena, Mrunmay Talegaonkar, Tejasvi Anand, Ahmed Elkholy, Amr Elshazly, Pavan Kumar Hanumolu:
A 4-to-10.5 Gb/s Continuous-Rate Digital Clock and Data Recovery With Automatic Frequency Acquisition. IEEE J. Solid State Circuits 51(2): 428-439 (2016)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.