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"An 82-107.6-GHz Integer-N ADPLL Employing a DCO With Split Transformer and ..."

Zhiqiang Huang, Howard C. Luong (2019)

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DOI: 10.1109/JSSC.2018.2876462

access: closed

type: Journal Article

metadata version: 2020-08-30

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Zhiqiang Huang, Howard C. Luong:
An 82-107.6-GHz Integer-N ADPLL Employing a DCO With Split Transformer and Dual-Path Switched-Capacitor Ladder and a Clock-Skew-Sampling Delta-Sigma TDC. IEEE J. Solid State Circuits 54(2): 358-367 (2019)

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