default search action

combined dblp search
author search
venue search
publication search

ask others

"A 0.4-to-3 GHz Digital PLL With PVT Insensitive Supply Noise Cancellation ..."

Amr Elshazly et al. (2011)

> Home

Details and statistics

DOI: 10.1109/JSSC.2011.2162912

access: closed

type: Journal Article

metadata version: 2020-08-30

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/ElshazlyIYYH11
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/ElshazlyIYYH11
Amr Elshazly, Rajesh Inti, Wenjing Yin, Brian Young, Pavan Kumar Hanumolu:
A 0.4-to-3 GHz Digital PLL With PVT Insensitive Supply Noise Cancellation Using Deterministic Background Calibration. IEEE J. Solid State Circuits 46(12): 2759-2771 (2011)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.