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"Time Constrained Verification of Analog Circuits using Model-Checking ..."

Darius Grabowski et al. (2005)

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DOI: 10.1016/J.ENTCS.2006.01.026

access: open

type: Conference or Workshop Paper

metadata version: 2023-01-20

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  dblp key:
  - journals/entcs/GrabowskiPHB06
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  - https://dblp.org/rec/journals/entcs/GrabowskiPHB06
Darius Grabowski, Daniel Platte, Lars Hedrich, Erich Barke:
Time Constrained Verification of Analog Circuits using Model-Checking Algorithms. FAC 2005: 37-52

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