default search action

combined dblp search
author search
venue search
publication search

ask others

"Predicate Abstraction and Refinement for Model Checking VHDL State Machines."

Mustapha Bourahla, Mohamed Benmohamed (2002)

> Home

Details and statistics

DOI: 10.1016/S1571-0661(04)80400-6

access: open

type: Conference or Workshop Paper

metadata version: 2022-12-06

- view
  - electronic edition via DOI (open access)
  authority control:
- export record
  dblp key:
  - journals/entcs/BourahlaB02
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/entcs/BourahlaB02
Mustapha Bourahla, Mohamed Benmohamed:
Predicate Abstraction and Refinement for Model Checking VHDL State Machines. FMICS 2002: 1-16

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.