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"Optimizing RISC-V ISA Usage by Sharing Coprocessors on MPSoC."

Pedro Lima et al. (2020)

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DOI: 10.1109/LATS49555.2020.9093677

access: closed

type: Conference or Workshop Paper

metadata version: 2022-04-09

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  dblp key:
  - conf/latw/LimaVRASGM20
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  - https://dblp.org/rec/conf/latw/LimaVRASGM20
Pedro Lima, Caio Vieira, Jorge Reis, Alexandre Almeida, Jarbas Silveira, Roger C. Goerl, César A. M. Marcon:
Optimizing RISC-V ISA Usage by Sharing Coprocessors on MPSoC. LATS 2020: 1-5

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