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"A 4.0 GHz 291Mb voltage-scalable SRAM design in 32nm high-κ ..."

Yih Wang et al. (2009)

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DOI: 10.1109/ISSCC.2009.4977505

access: closed

type: Conference or Workshop Paper

metadata version: 2024-04-26

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Yih Wang, Uddalak Bhattacharya, Fatih Hamzaoglu, Pramod Kolar, Yong-Gee Ng, Liqiong Wei, Ying Zhang, Kevin Zhang, Mark Bohr:
A 4.0 GHz 291Mb voltage-scalable SRAM design in 32nm high-κ metal-gate CMOS with integrated power management. ISSCC 2009: 456-457

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