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"A CAD approach for on-chip PDN with power and supply noise reduction for ..."

Moumita Chakraborty, Debasri Saha, Amlan Chakrabarti (2017)

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DOI: 10.1109/ISED.2017.8303948

access: closed

type: Conference or Workshop Paper

metadata version: 2020-03-27

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  dblp key:
  - conf/ised/ChakrabortySC17
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  - https://dblp.org/rec/conf/ised/ChakrabortySC17
Moumita Chakraborty, Debasri Saha, Amlan Chakrabarti:
A CAD approach for on-chip PDN with power and supply noise reduction for multi-voltage SOCS in pre-layout stage. ISED 2017: 1-4

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