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Kimon Karras
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2020 – today
- 2020
- [j5]Kimon Karras, Evangelos Pallis
, George Mastorakis, Yannis Nikoloudakis
A Hardware Acceleration Platform for AI-Based Inference at the Edge. Circuits Syst. Signal Process. 39(2): 1059-1070 (2020)
2010 – 2019
- 2017
- [j4]João Andrade, Nithin George, Kimon Karras, David Novo, Frederico Pratas, Leonel Sousa
Design Space Exploration of LDPC Decoders Using High-Level Synthesis. IEEE Access 5: 14600-14615 (2017) - [j3]Evangelos K. Markakis, Kimon Karras, Nikolaos Zotos
EXEGESIS: Extreme Edge Resource Harvesting for a Virtualized Fog Environment. IEEE Commun. Mag. 55(7): 173-179 (2017) - [j2]Evangelos K. Markakis, Kimon Karras, Anargyros Sideris, George Alexiou, Evangelos Pallis
Computing, Caching, and Communication at the Edge: The Cornerstone for Building a Versatile 5G Ecosystem. IEEE Commun. Mag. 55(11): 152-157 (2017) - 2015
- [c10]David Sidler, Gustavo Alonso, Michaela Blott, Kimon Karras, Kees A. Vissers, Raymond Carley:
Scalable 10Gbps TCP/IP Stack Architecture for Reconfigurable Hardware. FCCM 2015: 36-43 - [c9]João Andrade, Nithin George, Kimon Karras, David Novo, Vítor Manuel Mendes da Silva, Paolo Ienne, Gabriel Falcão Paiva Fernandes
Fast Design Space Exploration Using Vivado HLS: Non-binary LDPC Decoders. FCCM 2015: 97 - [c8]João Andrade, Nithin George, Kimon Karras, David Novo, Vítor Manuel Mendes da Silva, Paolo Ienne, Gabriel Falcão Paiva Fernandes
From low-architectural expertise up to high-throughput non-binary LDPC decoders: Optimization guidelines using high-level synthesis. FPL 2015: 1-8 - [c7]Michaela Blott, Ling Liu, Kimon Karras, Kees A. Vissers:
Scaling Out to a Single-Node 80Gbps Memcached Server with 40Terabytes of Memory. HotStorage 2015 - 2014
- [i1]Kimon Karras, Michaela Blott, Kees A. Vissers:
High-Level Synthesis Case Study: Implementation of a Memcached Server. CoRR abs/1408.5387 (2014) - 2013
- [b1]Kimon Karras:
A network processor architecture for high speed carrier grade ethernet networks. Technical University Munich, 2013, pp. 1-167 - [c6]Michaela Blott, Kimon Karras, Ling Liu, Kees A. Vissers, Jeremia Bär, Zsolt István:
Achieving 10Gbps Line-rate Key-value Stores with FPGAs. HotCloud 2013 - 2011
- [j1]Daniel Llorente, Kimon Karras, Thomas Wild, Andreas Herkersdorf:
Advanced Packet Segmentation and Buffering Algorithms in Network Processors. Trans. High Perform. Embed. Archit. Compil. 4: 334-353 (2011) - 2010
- [c5]Kimon Karras, Thomas Wild, Andreas Herkersdorf:
A folded pipeline network processor architecture for 100 Gbit/s networks. ANCS 2010: 2
2000 – 2009
- 2008
- [c4]Daniel Llorente, Kimon Karras, Thomas Wild, Andreas Herkersdorf:
Buffer allocation for advanced packet segmentation in Network Processors. ASAP 2008: 221-226 - [c3]Kimon Karras, Theodore Kyritsis, Massimiliano Amirfeiz, Stefano Baiotti:
Aeronautical Mobile Ad Hoc Networks. EW 2008 - [c2]Kimon Karras, Elias S. Manolakos
An embedded dynamically self-reconfigurable Master-Slaves MPSoC architecture. FPL 2008: 431-434 - [c1]Kimon Karras, Daniel Llorente, Thomas Wild, Andreas Herkersdorf:
Improving memory subsystem performance in network processors with smart packet segmentation. ICSAMOS 2008: 210-217
Coauthor Index
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