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Jonathan Borremans
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2010 – 2019
- 2018
- [j14]Lin-Kun Wu
, David San Segundo Bello, Philippe Coppejans, Jan Craninckx
Analysis and Design of a CMOS Ultra-High-Speed Burst Mode Imager with In-Situ Storage Topology Featuring In-Pixel CDS Amplification. Sensors 18(11): 3683 (2018) - [c23]Masato Osawa, S. Hiraide, S. Suzuki, H. Kato, Kosei Tamiya, Yasunari Harada, Kuba Raczkowski, J. L. Bacq, Peter Van Wesemael, M. Liu, Annachiara Spagnolo, K. De Munck, S. Guerrieri, Jonathan Borremans:
An Adaptive Frame Image Sensor with Fine-Grained Power Management for Ultra-Low Power Internet of Things Application. ESSCIRC 2018: 58-61 - 2015
- [c22]Bahman Yousefzadeh, Ugur Sonmez, Nandish Mehta
A generic read-out circuit for resistive transducers. IWASI 2015: 122-125 - 2014
- [j13]Barend van Liempd, Jonathan Borremans, Ewout Martens, Sungwoo Cha, Hans Suys, Bob Verbruggen, Jan Craninckx
A 0.9 V 0.4-6 GHz Harmonic Recombination SDR Receiver in 28 nm CMOS With HR3/HR5 and IIP2 Calibration. IEEE J. Solid State Circuits 49(8): 1815-1826 (2014) - 2013
- [c21]Barend van Liempd, Jonathan Borremans, Sungwoo Cha, Ewout Martens, Hans Suys, Jan Craninckx
IIP2 and HR calibration for an 8-phase harmonic recombination receiver in 28nm. CICC 2013: 1-4 - 2012
- [c20]Chunshu Li, Min Li, Marian Verhelst
A Generic Framework for Optimizing Digital Intensive Harmonic Rejection Receivers. SiPS 2012: 167-172 - 2011
- [j12]Jonathan Borremans, Gunjan Mandal, Vito Giannini
A 40 nm CMOS 0.4-6 GHz Receiver Resilient to Out-of-Band Blockers. IEEE J. Solid State Circuits 46(7): 1659-1671 (2011) - [c19]Jan Craninckx
SAW-less software-defined radio transceivers in 40nm CMOS. CICC 2011: 1-8 - [c18]Kameswaran Vengattaramane, Jonathan Borremans, Michiel Steyaert
A standard cell based all-digital Time-to-Digital Converter with reconfigurable resolution and on-line background calibration. ESSCIRC 2011: 275-278 - [c17]Jonathan Borremans, Gunjan Mandal, Vito Giannini
A 40nm CMOS highly linear 0.4-to-6GHz receiver resilient to 0dBm out-of-band blockers. ISSCC 2011: 62-64 - [c16]Vito Giannini
A multiband LTE SAW-less modulator with -160dBc/Hz RX-band noise in 40nm LP CMOS. ISSCC 2011: 374-376 - 2010
- [j11]Jonathan Borremans, Kameswaran Vengattaramane, Vito Giannini
A 86 MHz-12 GHz Digital-Intensive PLL for Software-Defined Radios, Using a 6 fJ/Step TDC in 40 nm Digital CMOS. IEEE J. Solid State Circuits 45(10): 2116-2129 (2010) - [j10]Mark Ingels, Vito Giannini
A 5 mm2 40 nm LP CMOS Transceiver for a Software-Defined Radio Platform. IEEE J. Solid State Circuits 45(12): 2794-2806 (2010) - [c15]Jonathan Borremans, Gunjan Mandal, Björn Debaillie, Vito Giannini
A sub-3dB NF voltage-sampling front-end with +18dBm IIP3 and +2dBm blocker compression point. ESSCIRC 2010: 402-405 - [c14]Mark Ingels, Vito Giannini
A 5mm2 40nm LP CMOS 0.1-to-3GHz multistandard transceiver. ISSCC 2010: 458-459 - [c13]Jonathan Borremans, Kameswaran Vengattaramane, Kameswaran Giannini, Jan Craninckx
A 86MHz-to-12GHz digital-intensive phase-modulated fractional-N PLL using a 15pJ/Shot 5ps TDC in 40nm digital CMOS. ISSCC 2010: 480-481
2000 – 2009
- 2009
- [j9]Jonathan Borremans, Steven Thijs, Piet Wambacq, Yves Rolain, Dimitri Linten, Maarten Kuijk:
A Fully Integrated 7.3 kV HBM ESD-Protected Transformer-Based 4.5-6 GHz CMOS LNA. IEEE J. Solid State Circuits 44(2): 344-353 (2009) - [j8]Jonathan Borremans, Julien Ryckaert, Claude Desset, Maarten Kuijk, Piet Wambacq, Jan Craninckx
A Low-Complexity, Low-Phase-Noise, Low-Voltage Phase-Aligned Ring Oscillator in 90 nm Digital CMOS. IEEE J. Solid State Circuits 44(7): 1942-1949 (2009) - [j7]Julien Ryckaert, Jonathan Borremans, Bob Verbruggen, Lynn Bos, Costantino Armiento, Jan Craninckx
A 2.4 GHz Low-Power Sixth-Order RF Bandpass ΔΣ Converter in CMOS. IEEE J. Solid State Circuits 44(11): 2873-2880 (2009) - [j6]Vito Giannini
A 2-mm2 0.1-5 GHz Software-Defined Radio Receiver in 45-nm Digital CMOS. IEEE J. Solid State Circuits 44(12): 3486-3498 (2009) - [j5]Dimitri Linten, Steven Thijs, Jonathan Borremans, Morin Dehan, David Trémouilles
A plug-and-play wideband RF circuit ESD protection methodology: T-diodes. Microelectron. Reliab. 49(12): 1440-1446 (2009) - [c12]Jonathan Borremans, Steven Thijs, Morin Dehan, Abdelkarim Mercha, Piet Wambacq:
Low-cost feedback-enabled LNAs in 45nm CMOS. ESSCIRC 2009: 100-103 - [c11]Jonathan Borremans, Kuba Raczkowski, Piet Wambacq:
A digitally controlled compact 57-to-66GHz front-end in 45nm digital CMOS. ISSCC 2009: 492-493 - 2008
- [j4]Jonathan Borremans, Piet Wambacq, Charlotte Soens, Yves Rolain, Maarten Kuijk:
Low-Area Active-Feedback Low-Noise Amplifier Design in Scaled Digital CMOS. IEEE J. Solid State Circuits 43(11): 2422-2433 (2008) - [j3]Karen Scheir, Stephane Bronckers, Jonathan Borremans, Piet Wambacq, Yves Rolain:
A 52 GHz Phased-Array Receiver Front-End in 90 nm Digital CMOS. IEEE J. Solid State Circuits 43(12): 2651-2659 (2008) - [j2]Jonathan Borremans, Andrea Bevilacqua
A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS. IEEE J. Solid State Circuits 43(12): 2693-2705 (2008) - [c10]Steven Thijs, Mototsugu Okushima, Jonathan Borremans, Philippe Jansen, Dimitri Linten, Mirko Scholz, Piet Wambacq, Guido Groeseneken
Inductor-based ESD protection under CDM-like ESD stress conditions for RF applications. CICC 2008: 49-52 - [c9]Jonathan Borremans, Julien Ryckaert, Piet Wambacq, Maarten Kuijk, Jan Craninckx
A low-complexity, low phase noise, low-voltage phase-aligned ring oscillator in 90 nm digital CMOS. ESSCIRC 2008: 410-413 - [c8]Karen Scheir, Stephane Bronckers, Jonathan Borremans, Piet Wambacq, Yves Rolain:
A 52GHz Phased-Array Receiver Front-End in 90nm Digital CMOS. ISSCC 2008: 184-185 - [c7]Jonathan Borremans, Stephane Bronckers, Piet Wambacq, Maarten Kuijk, Jan Craninckx
A Single-Inductor Dual-Band VCO in a 0.06mm2 5.6GHz Multi-Band Front-End in 90nm Digital CMOS. ISSCC 2008: 324-325 - [c6]Piet Wambacq, Abdelkarim Mercha, Karen Scheir, Bob Verbruggen, Jonathan Borremans, Vincent De Heyn, Steven Thijs, Dimitri Linten, Geert Van der Plas
Advanced Planar Bulk and Multigate CMOS Technology: Analog-Circuit Benchmarking up to mm-Wave Frequencies. ISSCC 2008: 528-529 - [c5]Jonathan Borremans, Piet Wambacq, Maarten Kuijk, Geert Carchon, Stefaan Decoutere:
A 400 μW 4.7-to-6.4GHz VCO under an Above-IC Inductor in 45nm CMOS. ISSCC 2008: 536-537 - 2007
- [j1]Piet Wambacq, Bob Verbruggen, Karen Scheir, Jonathan Borremans, Morin Dehan, Dimitri Linten, Vincent De Heyn, Geert Van der Plas, Abdelkarim Mercha, Bertrand Parvais, Cedric Gustin, Vaidyanathan Subramanian, Nadine Collaert
The Potential of FinFETs for Analog and RF Circuit Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(11): 2541-2551 (2007) - [c4]Jonathan Borremans, Ludwig De Locht, Piet Wambacq, Yves Rolain:
Nonlinearity analysis of Analog/RF circuits using combined multisine and volterra analysis. DATE 2007: 261-266 - [c3]Jonathan Borremans, Piet Wambacq, Geert Van der Plas
A switchable low-area 2.4-and-5 GHz dual-band LNA in digital CMOS. ESSCIRC 2007: 376-379 - [c2]Jonathan Borremans, Piet Wambacq, Dimitri Linten:
An ESD-Protected DC-to-6GHz 9.7mW LNA in 90nm Digital CMOS. ISSCC 2007: 422-613 - 2006
- [c1]Stefaan Decoutere, Piet Wambacq, Vaidy Subramanian, Jonathan Borremans, Abdelkarim Mercha:
Technologies for (sub-) 45nm Analog/RF CMOS - Circuit Design Opportunities and Challenges. CICC 2006: 679-686
Coauthor Index
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