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Chien-Ming Wu
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2020 – today
- 2024
- [c52]Chu-Hui Lee
, Bo-Yu Jiang
Apply 2D convolution kernels on EEGNet to improve classification accuracy. ICMHI 2024: 153-157 - [c51]Chun-Ming Huang, Wei-Lin Lai, Chih-Chyau Yang, Yi-Jie Hsieh, Chien-Ming Wu, Chu-Hui Lee:
LSvT: EEG Channel Localization and Selection via Training for BCI Applications. IJCNN 2024: 1-6 - 2023
- [c50]Chu-Hui Lee, Bo-Yu Jiang, Chun-Ming Huang, Chien-Ming Wu:
Effectively reduce the number of EEG channels by deleting nonessential channels. iCAST 2023: 295-300 - [c49]Chih-Chyau Yang, Chun-Yu Chen, Fu-Chen Cheng, Tsung-Jen Hsieh, Chien-Ming Wu, Chun-Ming Huang:
DLA-SP: A System Platform for Deep-Learning Accelerator Integration. IECON 2023: 1-4 - [c48]Chih-Chyau Yang, Chih-Ting Kuo, Ssu-Ying Chen, Hao-Wu Liu, Fu-Chen Cheng, Yi-Jie Hsieh, Jin-Ju Chue, Chien-Ming Wu, Chun-Ming Huang:
AI-EMS: An Environmental Monitoring System with AI Prediction. SENSORS 2023: 1-4 - 2022
- [j14]Hsien-Yi Hsieh
Direct Parameter Estimations from Machine Learning-Enhanced Quantum State Tomography. Symmetry 14(5): 874 (2022) - [j13]Kuo-Wei Chang
A Real-Time 1280 × 720 Object Detection Chip With 585 MB/s Memory Traffic. IEEE Trans. Very Large Scale Integr. Syst. 30(6): 816-825 (2022) - [c47]Chun-Ming Huang, Fu-Cheng Cheng, Jin-Ju Chue, Wei-Lin Lai, Yi-Jie Hsieh, Chih-Chyau Yang, Chien-Ming Wu:
vMic: A Surface Vibration Microphone. IEEE SENSORS 2022: 1-4 - [c46]Ssu-Ying Chen, Yi-Jie Hsieh, Hsiao-Ju Lo, Fu-Chen Cheng, Chih-Chyau Yang, Chien-Ming Wu, Chun-Ming Huang:
SenCu as a Sensing System to Experience Programming Design. TALE 2022: 99-104 - [i2]Kuo-Wei Chang, Hsu-Tung Shih, Tian-Sheuan Chang, Shang-Hong Tsai, Chih-Chyau Yang, Chien-Ming Wu, Chun-Ming Huang:
A Real Time 1280x720 Object Detection Chip With 585MB/s Memory Traffic. CoRR abs/2205.01571 (2022) - 2020
- [j12]Meng-Pai Hung
Intraseasonal Vertical Cloud Regimes Based on CloudSat Observations over the Tropics. Remote. Sens. 12(14): 2273 (2020) - [c45]Ssu-Ying Chen, Chih-Chyau Yang, Fu-Cheng Cheng, Yu-An Kuo, Jin-Ju Chue, Chen-Chia Chen, Chien-Ming Wu, Chun-Ming Huang:
Live Demonstration: SenCu - A Power-Efficient Sensor System. IEEE SENSORS 2020: 1 - [c44]Chih-Chyau Yang, Yi-Jie Hsieh, Wei-Lin Lai, Chun-Yu Chen, Jin-Ju Chue, Chien-Ming Wu, Chun-Ming Huang:
A Portable Power-efficient PM2.5 Sensor System. IEEE SENSORS 2020: 1-4
2010 – 2019
- 2019
- [j11]Huai-Yi Chen
A Cost-Effective Modified Bright-Mode Automatic Prism Coupler for Planar Optical Waveguide Characterization. IEEE Trans. Educ. 62(1): 40-47 (2019) - [c43]Chih-Chyau Yang, Yi-Jie Hsieh, Chun-Wen Cheng, Wei-Lin Lai, Chien-Ming Wu, Chun-Ming Huang:
Live Demonstration: A Plug-and-Sense Smart Sensor System. IEEE SENSORS 2019: 1 - [c42]Chun-Ming Huang, Chih-Chyau Yang, Yi-Jie Hsieh, Chun-Wen Cheng, Yi-Jun Liu, Jia-Rong Chang, Yu-Tsang Chang, Chien-Ming Wu:
A Smart Sensor Development Platform and Its System Demonstration. ISCAS 2019: 1-4 - [i1]Shih-Wen Tsou, Chun-Yian Su
Learning the Representations of Moist Convection with Convolutional Neural Networks. CoRR abs/1905.09614 (2019) - 2017
- [c41]Chun-Ming Huang, Yi-Jie Hsieh, Wei-Lin Lai, Yi-Jun Liu, Chun-Ying Juan, Ssu-Ying Chen, Chun-Yu Chen, Jin-Ju Chue, Chih-Chyau Yang, Chien-Ming Wu:
A modular wireless sensor platform and its applications. ISCAS 2017: 1-4 - 2016
- [c40]Chun-Ming Huang, Chih-Chyau Yang, Chien-Ming Wu, Chun-Wen Cheng, Chun-Yu Chen, Yi-Jun Liu:
Live demonstration: MorFPGA duo platform with dual-camera support. APCCAS 2016: 738-739 - [c39]Ssu-Ying Chen, Yi-Jie Hsieh, Chih-Chyau Yang, Chien-Ming Wu, Chun-Ming Huang:
A real-time bridge scour sensor system with accelerometers. I2MTC 2016: 1-6 - [c38]Chih-Chyau Yang, Ssu-Ying Chen, Yi-Jie Hsieh, Fu-Chen Cheng, Yu-Cheng Huang, Jin-Ju Chue, Chih-Ting Kuo, Chien-Ming Wu, Chun-Ming Huang:
A rugged sensor system for real-time bridge safety monitoring in Taiwan. SAS 2016: 1-5 - 2015
- [j10]Chih-Chyau Yang, Chien-Ming Wu, Chun-Ming Huang:
A Cost-Effective 3D SoC Silicon Prototyping Platform. J. Inf. Sci. Eng. 31(6): 1885-1901 (2015) - [c37]Chih-Hsing Lin, Ssu-Ying Chen, Chih-Ting Kuo, Gang-Neng Sung, Chih-Chyau Yang, Chien-Ming Wu, Chun-Ming Huang:
A real-time bridge structural health monitoring device using cost-effective one-axis accelerometers. ISSNIP 2015: 1-2 - 2014
- [c36]Chih-Chyau Yang, Yi-Jun Liu, Chien-Ming Wu, Chun-Ming Huang:
Live demonstration: A 3D die-level integration platform. APCCAS 2014: 179-180 - [c35]Chih-Hsing Lin, Ssu-Ying Chen, Chih-Chyau Yang, Chien-Ming Wu, Chun-Ming Huang, Chih-Ting Kuo, Yu-Da Huang:
Structural health monitoring of bridges using cost-effective 1-axis accelerometers. SAS 2014: 24-27 - 2013
- [c34]Chun-Chieh Chiu, Chih-Hsing Lin, Chih-Chyau Yang, Yi-Jun Liu, Ssu-Ying Chen, Jin-Ju Chue, Chih-Ting Kuo, Gang-Neng Sung, Chun-Pin Lin, Chien-Ming Wu, Chun-Ming Huang:
Morpack Cube: A portable 3D heterogeneous system integration platform. SoCC 2013: 197-202 - 2012
- [c33]Chun-Ming Huang, Chih-Chyau Yang, Chien-Ming Wu, Chih-Hsing Lin, Chun-Chieh Chiu, Yi-Jun Liu, Chun-Chieh Chu, Nien-Hsiang Chang, Wen-Ching Chen:
A modularized 3D heterogeneous system integration platform. APCCAS 2012: 396-399 - [c32]Chen-Chia Chen, Shih-Hsun Hsu, Chen-Hsiang Sang, Chih-Chyau Yang, Chien-Ming Wu, Chun-Ming Huang, Jeng-Tzong Sheu:
Multi-layer planar micro-coils chip as actuators and heaters for biological applications. BioCAS 2012: 392-395 - [c31]Chih-Ting Kuo, Chun-Yu Chen, Yu-Tsang Chang, Chun-Pin Lin, Chien-Ming Wu, Chun-Ming Huang:
CIC signal processing embedded system a modulizable platform for multi-domain signal processing. EMBC 2012: 2849-2852 - [c30]Chun-Ming Huang, Chih-Chyau Yang, Chien-Ming Wu, Chih-Hsing Lin, Chun-Chieh Chiu, Yi-Jun Liu, Chun-Chieh Chu, Chun-Ping Lin, Wei-De Chien:
Boundary scan test solution for MorPACK platform. ISPACS 2012: 802-805 - [c29]Yi-Jun Liu, Chih-Chyau Yang, Chih-Hsing Lin, Chun-Chieh Chiu, Chun-Chieh Chu, Chien-Ming Wu, Chun-Ming Huang:
Microphone array application prototyping with MorPACK heterogeneous integrated system. SII 2012: 734-739 - [c28]Chun-Ming Huang, Chih-Chyau Yang, Chien-Ming Wu, Chun-Chieh Chiu, Yi-Jun Liu, Chun-Chieh Chu, Nien-Hsiang Chang, Wen-Ching Chen, Chih-Hsing Lin, Hua-Hsin Luo:
A novel design flow for a 3D heterogeneous system prototyping platform. SoCC 2012: 78-82 - [c27]Chien-Lin Huang, Nian-Shyang Chang, Chi-Shi Chen, Chun-Pin Lin, Chien-Ming Wu, Chun-Ming Huang:
A novel design methodology for hybrid process 3D-IC. VLSI-DAT 2012: 1-4 - [c26]Yi-Jun Liu, Chih-Chyau Yang, Shih-Lun Chen, Chun-Chieh Chiu, Chien-Ming Wu, Chun-Ming Huang:
An efficient memory controller for 3D heterogeneous integration platform. VLSI-DAT 2012: 1-4 - 2011
- [j9]Ming-Der Shieh, Wen-Ching Lin, Chien-Ming Wu:
Design of High-Speed Iterative Dividers in GF(2m). J. Inf. Sci. Eng. 27(3): 953-967 (2011) - [j8]Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, Shih-Lun Chen, Chi-Shi Chen, Jiann-Jenn Wang, Kuen-Jong Lee, Chin-Long Wey:
Programmable System-on-Chip for Silicon Prototyping. IEEE Trans. Ind. Electron. 58(3): 830-838 (2011) - [c25]Jimi Yung-Chuan Wen, Gu Yuan Lin, Today Sung, Minsiong Liang, Gary Tsai, Ming Whei Feng, Chien-Ming Wu:
A complex event processing architecture for energy and operation management: industrial experience report. DEBS 2011: 313-316 - [c24]Kai-Chao Yang, Yu-Tsang Chang, Chien-Ming Wu, Chun-Ming Huang, Hua-Hsin Luo:
Application-oriented teaching of embedded systems. MSE 2011: 118-121 - [c23]Chih-Chyau Yang, Nien-Hsiang Chang, Shih-Lun Chen, Wei-De Chien, Chi-Shi Chen, Chien-Ming Wu, Chun-Ming Huang:
A novel methodology for Multi-Project System-on-a-Chip. SoCC 2011: 308-311 - 2010
- [c22]Wen-Ching Lin, Ming-Der Shieh, Chien-Ming Wu:
Design of high-speed bit-serial divider in GF(2m). ISCAS 2010: 713-716 - [c21]Hsin-Fu Luo, Ming-Der Shieh, Yi-Jun Liu, Chien-Ming Wu:
Efficient memory management for FFT processors. ISCAS 2010: 3737-3740 - [c20]Yung-Kuei Lu, Ming-Der Shieh, Chien-Ming Wu:
Low-complexity Reed-Solomon decoder for optical communications. ISCAS 2010: 4173-4176
2000 – 2009
- 2009
- [j7]Ming-Der Shieh, Jun-Hong Chen, Wen-Ching Lin, Chien-Ming Wu:
An Efficient Multiplier/Divider Design for Elliptic Curve Cryptosystem over GF(2m). J. Inf. Sci. Eng. 25(5): 1555-1573 (2009) - [c19]Wen-Ching Lin, Ming-Der Shieh, Chien-Ming Wu:
Flexible GF(2m) Divider Design for Cryptographic Applications. ISCAS 2009: 25-28 - [c18]Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, Wei-De Chien, Shih-Lun Chen, Chi-Shi Chen, Jiann-Jenn Wang, Chin-Long Wey:
Implementation and Prototyping of a Complex Multi-project System-on-a-chip. ISCAS 2009: 2321-2324 - [c17]Pei-Lin Hou, Chia-Shin Yen, Chien-Ming Wu, Kun-Cheng Tsai:
True Event Decision by Cooperative Sensor Network. Mobile Data Management 2009: 377-378 - 2008
- [j6]Ming-Der Shieh, Tai-Ping Wang, Chien-Ming Wu:
Reducing Interconnect Complexity for Efficient Path Metric Memory Management in Viterbi Decoders. IEICE Trans. Inf. Syst. 91-D(9): 2300-2311 (2008) - [c16]Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, Chin-Long Wey:
PrSoC: Programmable System-on-chip (SoC) for silicon prototyping. ISCAS 2008: 3382-3385 - 2007
- [c15]Pei-Lin Hou, Chih-Jung Lin, Satoshi Kondo, Chien-Ming Wu:
Reduction of image coding artifacts using spatial structure analysis. ISSPA 2007: 1-4 - 2006
- [j5]Ming-Der Shieh, Jun-Hong Chen, Chien-Ming Wu:
High-Speed Design of Montgomery Inverse Algorithm over GF(2m). IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(2): 559-565 (2006) - [c14]Ming-Der Shieh, Tai-Ping Wang, Chien-Ming Wu, Chun-Ming Huang:
Efficient path metric access for reducing interconnect overhead in Viterbi decoders. ISCAS 2006 - [c13]Chun-Ming Huang, Kuen-Jong Lee, Chih-Chyau Yang, Wen-Hsiang Hu, Shi-Shen Wang, Jeng-Bin Chen, Chi-Shi Chen, Lan-Da Van, Chien-Ming Wu, Wei-Chang Tsai, Jing-Yang Jou:
Multi-Project System-on-Chip (MP-SoC): A Novel Test Vehicle for SoC Silicon Prototyping. SoCC 2006: 137-140 - 2005
- [j4]Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu, Yin-Tsung Hwang, Jun-Hong Chen:
VLSI architectural design tradeoffs for sliding-window log-MAP decoders. IEEE Trans. Very Large Scale Integr. Syst. 13(4): 439-447 (2005) - [c12]Hong-Yu Chao, Jia-Shung Wang, Juin-Long Lin, Kai-Chao Yang, Chien-Ming Wu, Chun-Ming Huang, Lan-Da Van:
High-performance low-complexity bit-plane coding scheme for MPEG-4 FGS. ICME 2005: 89-92 - [c11]Jun-Hong Chen, Ming-Der Shieh, Chien-Ming Wu:
Concurrent algorithm for high-speed point multiplication in elliptic curve cryptography. ISCAS (5) 2005: 5254-5257 - 2004
- [j3]Chien-Hsing Wu, Chien-Ming Wu, Ming-Der Shieh, Yin-Tsung Hwang:
High-Speed, Low-Complexity Systolic Designs of Novel Iterative Division Algorithms in GF(2^m). IEEE Trans. Computers 53(3): 375-380 (2004) - [c10]Lan-Da Van, Hsin-Fu Luo, Chien-Ming Wu, Wen-Hsiang Hu, Chun-Ming Huang, Wei-Chang Tsai:
A high-performance area-aware DSP processor architecture for video codecs. ICME 2004: 1499-1502 - [c9]Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu, Yin-Tsung Hwang, Jun-Hong Chen, Hsin-Fu Lo:
VLSI architecture exploration for sliding-window Log-MAP decoders. ISCAS (2) 2004: 513-516 - 2003
- [c8]Chien-Ming Wu, Ming-Der Shieh, Hsin-Fu Lo, Min-Hsiung Hu:
Implementation of channel demodulator for DAB system. ISCAS (2) 2003: 137-140 - 2002
- [j2]Chien-Hsing Wu, Chien-Ming Wu, Ming-Der Shieh, Yin-Tsung Hwang:
Novel Algorithms and VLSI Design for Division over GF(2m). IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(5): 1129-1139 (2002) - [c7]Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu:
Memory arrangements in turbo decoders using sliding-window BCJR algorithm. ISCAS (5) 2002: 557-560 - [c6]Chien-Hsing Wu, Chien-Ming Wu, Ming-Der Shieh, Yin-Tsung Hwang:
An area-efficient systolic division circuit over GF(2m) for secure communication. ISCAS (5) 2002: 733-736 - 2001
- [c5]Chien-Hsing Wu, Chien-Ming Wu, Ming-Der Shieh, Yin-Tsung Hwang:
Systolic VLSI realization of a novel iterative division algorithm over GF(2m): a high-speed, low-complexity design. ISCAS (4) 2001: 33-36 - [c4]Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu, Ming-Hwa Sheu:
VLSI architecture of extended in-place path metric update for Viterbi decoders. ISCAS (4) 2001: 206-209 - [c3]Hsin-Fu Lo, Ming-Der Shieh, Chien-Ming Wu:
Design of an efficient FFT processor for DAB system. ISCAS (4) 2001: 654-657 - 2000
- [c2]Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu, Ming-Hwa Sheu:
An efficient approach for in-place scheduling of path metric update in Viterbi decoders. ISCAS 2000: 61-64
1990 – 1999
- 1999
- [j1]Ming-Der Shieh, Chien-Ming Wu, Hsiao-Hsing Chou, Min-Hui Chen, Chia-Liang Liu:
Design and implementation of a DAB channel decoder. IEEE Trans. Consumer Electron. 45(3): 553-562 (1999) - [c1]Jin-Chuan Huang, Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu:
An area-efficient versatile Reed-Solomon decoder for ADSL. ISCAS (1) 1999: 517-520
Coauthor Index
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