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Longbing Zhang
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2020 – today
- 2024
- [c18]Chongxi Wang, Penghao Song, Haoyu Zhao, Fuxin Zhang, Jian Wang, Longbing Zhang:
High-Utilization GPGPU Design for Accelerating GEMM Workloads: An Incremental Approach. ISCAS 2024: 1-5 - 2023
- [c17]Haoyu Zhao
, Longbing Zhang
RBGC: Repurpose the Buffer of Fixed Graphics Pipeline to Enhance GPU Cache. ACM Great Lakes Symposium on VLSI 2023: 173-177 - [c16]Chongxi Wang, Penghao Song, Haoyu Zhao, Fuxin Zhang, Jian Wang, Longbing Zhang:
Randomized Testing Framework for Dissecting NVIDIA GPGPU Thread Block-To-SM Scheduling Mechanisms. ICPADS 2023: 1843-1852 - 2022
- [j5]Dongdong Xu
Ring-ExpLWE: A High-Performance and Lightweight Post-Quantum Encryption Scheme for Resource-Constrained IoT Devices. IEEE Internet Things J. 9(23): 24122-24134 (2022) - [c15]Zhenjiang Guo, Huandong Wang, Longbing Zhang, Junhua Xiao:
TCRing: A Novel Single-Channel Deadlock-Free Concentrated on-Chip Network. HPCC/DSS/SmartCity/DependSys 2022: 1394-1399 - 2021
- [c14]Ke Zhang, Congwu Zhang, Yisong Chang, Yungang Bao, Mingyu Chen, Longbing Zhang, Zhiwei Xu, Jonathan Gratch, Jian Zhang, Ninghui Sun:
Teaching Computer System Courses with an Online Large-Scale Method. TALE 2021: 1-6
2010 – 2019
- 2019
- [j4]Zhenxue He, Limin Xiao, Fei Gu, Li Ruan, Zhisheng Huo, Mingzhe Li, Mingfa Zhu, Longbing Zhang, Rui Liu, Xiang Wang:
EDOA: an efficient delay optimization approach for mixed-polarity Reed-Muller logic circuits under the unit delay model. Frontiers Comput. Sci. 13(5): 1102-1115 (2019) - 2017
- [j3]Zhenxue He, Limin Xiao, Fei Gu, Tongsheng Xia, Shubin Su, Zhisheng Huo, Rong Zhang, Longbing Zhang, Li Ruan, Xiang Wang:
An efficient and fast polarity optimization approach for mixed polarity Reed-Muller logic circuits. Frontiers Comput. Sci. 11(4): 728-742 (2017) - [j2]Zhenxue He, Limin Xiao, Li Ruan, Fei Gu, Zhisheng Huo, Guangjun Qin, Mingfa Zhu, Longbing Zhang, Rui Liu, Xiang Wang:
A Power and Area Optimization Approach of Mixed Polarity Reed-Muller Expression for Incompletely Specified Boolean Functions. J. Comput. Sci. Technol. 32(2): 297-311 (2017) - [c13]Zhenxue He, Guangjun Qin, Limin Xiao, Fei Gu, Zhisheng Huo, Li Ruan, Haitao Wang, Longbing Zhang, Jianbin Liu, Shaobo Liu, Xiang Wang:
An Efficient Polarity Optimization Approach for Fixed Polarity Reed-Muller Logic Circuits Based on Novel Binary Differential Evolution Algorithm. NPC 2017: 118-121 - 2016
- [c12]Jie Fu, Guojie Jin, Longbing Zhang, Jian Wang:
CAOS: combined analysis with online sifting for dynamic compilation systems. Conf. Computing Frontiers 2016: 110-118 - [c11]Zhenxue He, Limin Xiao, Longbing Zhang, Fei Gu, Zhisheng Huo, Mingfa Zhu, Li Ruan, Rui Liu, Xiang Wang:
EMA-FPRMs: An efficient minimization algorithm for fixed polarity Reed-Muller expressions. FPT 2016: 253-256 - 2015
- [c10]Lei Wang, Shaoli Liu, Chao Lu, Longbing Zhang, Junhua Xiao, Jian Wang:
Stable Matching Scheduler for Single-ISA Heterogeneous Multi-core Processors. APPT 2015: 45-59 - [c9]Xinke Chen, Guangfei Zhang, Huandong Wang, Ruiyang Wu, Peng Wu, Longbing Zhang:
MRP: mix real cores and pseudo cores for FPGA-based chip-multiprocessor simulation. DATE 2015: 211-216 - [c8]Qi Ao, Longbing Zhang, Shuai Chen, Jie Fu, Bin Liao:
A Fault-Tolerant Java Virtual Machine Using Fast Rejuvenation for Soft-Error-Prone Systems. HPCC/CSS/ICESS 2015: 463-469 - 2014
- [c7]Chao Lu, Shaoli Liu, Lei Wang, Longbing Zhang, Meng Wen:
Archipelago: A Floorplan Optimized for Concurrent Multiple Applications on Network-on-Chip. NAS 2014: 252-258 - 2012
- [c6]Wen Su, Longbing Zhang, Dan Tang, Xiang Gao:
Using Direct Cache Access Combined with Integrated NIC Architecture to Accelerate Network Processing. HPCC-ICESS 2012: 509-515 - [c5]Wen Su, Jing Wang, Longbing Zhang, Xinke Chen:
Address-Locking Cache: A Flexible on Chip Memory Implementation for Embedded System. HPCC-ICESS 2012: 1516-1519 - 2011
- [c4]Shouqing Hao, Qi Liu, Longbing Zhang, Jian Wang:
Processes Scheduling on Heterogeneous Multi-core Architecture with Hardware Support. NAS 2011: 236-241
2000 – 2009
- 2009
- [c3]Menghao Su, Xiang Gao, Yunji Chen
Efficiency-Aware QoS DRAM Scheduler. NAS 2009: 223-226 - 2007
- [j1]Hou Rui, Longbing Zhang, Weiwu Hu:
Accelerating sequential programs on Chip Multiprocessors via Dynamic Prefetching Thread. Microprocess. Microsystems 31(3): 200-211 (2007) - 2006
- [c2]Hou Rui, Longbing Zhang, Weiwu Hu:
A Hybrid Hardware/Software Generated Prefetching Thread Mechanism on Chip Multiprocessors. Euro-Par 2006: 506-516 - 2004
- [c1]Fei Cai, Shaogang Wu, Longbing Zhang, Zhiming Tang:
Parallel program performance evaluation and their behavior analysis on an OpenMP cluster. CCGRID 2004: 508-514
Coauthor Index
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last updated on 2024-07-21 22:01 CEST by the dblp team
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