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Andrej Zemva
Person information
- affiliation: Faculty of Electrical Enginering, University of Ljubljana, Ljubljana, Slovenia
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2020 – today
- 2021
- [j11]Damjan Zadnik, Andrej Zemva:
Image Acquisition Device for Smart-City Access Control Applications Based on Iris Recognition. Sensors 21(18): 6185 (2021) - 2020
- [c15]Andrej Zemva, Andrej Trost:
Message from the Program Chairs. DSD 2020: xxiii-xxiv
2010 – 2019
- 2019
- [c14]Andrej Trost, Andrej Zemva:
Online VHDL Generator and Analysis Tool. MECO 2019: 1-4 - 2017
- [c13]Andrej Trost, Andrej Zemva:
Pipeline circuit synthesis from Python code. MECO 2017: 1-4 - 2015
- [c12]Andrej Trost, Andrej Zemva:
Configurable hardware components generator in Python. MECO 2015: 96-99 - 2012
- [j10]Tomaz Nahtigal, Primoz Puhar, Andrej Zemva:
A systematic approach to configurable functional verification of HW IP blocks at transaction level. Comput. Electr. Eng. 38(6): 1513-1523 (2012) - [c11]Jure Mocnik, Andrej Zemva:
Communication-control concept in distribution network with dispersed energy resources. ISGT Europe 2012: 1-6 - [c10]Andrej Trost, Andrej Zemva:
Verification structures for design of video processing circuits. MIPRO 2012: 222-227 - 2011
- [j9]Kristjan Basa, Andrej Zemva:
Simulation and Verification of a Dynamic Model of the Electric Forklift Truck. Intell. Autom. Soft Comput. 17(1): 13-30 (2011) - 2010
- [j8]Vladimir M. Poucki, Andrej Zemva, Miroslav D. Lutovac
, Tomaz Karcnik:
Elliptic IIR filter sharpening implemented on FPGA. Digit. Signal Process. 20(1): 13-22 (2010) - [j7]Matej Cvikl, Andrej Zemva:
FPGA-oriented HW/SW implementation of ECG beat detection and classification algorithm. Digit. Signal Process. 20(1): 238-248 (2010)
2000 – 2009
- 2009
- [j6]Mark Umberger, Iztok Humar, Andrej Kos, Joze Guna
The integration of home-automation and IPTV system and services. Comput. Stand. Interfaces 31(4): 675-684 (2009) - 2008
- [c9]Primoz Puhar, Andrej Zemva:
Functional Verification of a USB Host Controller. DSD 2008: 735-740 - 2007
- [j5]Matej Cvikl, Franc Jager, Andrej Zemva:
Hardware Implementation of a Modified Delay-Coordinate Mapping-Based QRS Complex Detection Algorithm. EURASIP J. Adv. Signal Process. 2007 (2007) - [j4]Andrej Zemva, Matjaz Verderber:
FPGA-oriented HW/SW implementation of the MPEG-4 video decoder. Microprocess. Microsystems 31(5): 313-325 (2007) - 2005
- [j3]Matjaz Finc, Andrej Zemva:
A systematic approach to profiling for hardware/software partitioning. Comput. Electr. Eng. 31(2): 93-111 (2005) - [j2]Matjaz Finc, Andrej Zemva:
Profiling soft-core processor applications for hardware/software partitioning. J. Syst. Archit. 51(5): 315-329 (2005) - [j1]Andrej Zemva, Baldomir Zajc:
Test generation for technology-specific multi-faults based on detectable perturbations. Microelectron. Reliab. 45(1): 163-173 (2005) - 2003
- [c8]Matjaz Verderber, Andrej Zemva, Damjan Lampret:
HW/SW Partitioned Optimization and VLSI-FPGA Implementation of the MPEG-2 Video Decoder. DATE 2003: 20238-20243 - [c7]Matjaz Verderber, Andrej Zemva, Andrej Trost:
HW/SW Codesign of the MPEG-2 Video Decoder. IPDPS 2003: 179 - 2000
- [c6]Andrej Trost, Andrej Zemva, Baldomir Zajc:
Educational Programmable Hardware Prototyping and Verification System. FPL 2000: 818-821
1990 – 1999
- 1999
- [c5]Gregor Polansek, Andrej Zemva, Andrej Trost:
HW/SW Co-Simulation of Target C++ Applications and Synthesizable HDL with Performance Estimation. EUROMICRO 1999: 1468-1471 - 1998
- [c4]Andrej Trost, Andrej Zemva, Baldomir Zajc:
Programmabel Prototyping System for Image Processing. FPL 1998: 490-494 - 1996
- [c3]Andrej Trost, Roman Kuznar, Andrej Zemva, Baldomir Zajc:
An Experimental Programmable Environment for Prototyping Digital Circuits. FPL 1996: 337-345 - 1995
- [c2]Andrej Zemva, Franc Brglez:
Detectable perturbations: a paradigm for technology-specific multi-fault test generation. VTS 1995: 350-357 - 1994
- [c1]Andrej Zemva, Franc Brglez, Krzysztof Kozminski, Baldomir Zajc:
A Functionality Fault Model: Feasibility and Applications. EDAC-ETC-EUROASIC 1994: 152-158
Coauthor Index
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