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Yuki Ando
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2020 – today
- 2020
- [c6]Shunsuke Nansai, Yuki Ando, Norihiro Kamamichi
, Hiroshi Itoh:
Kinematics Analysis and Tracking Control of Novel Single Actuated Lizard Type Robot. SMC 2020: 315-320
2010 – 2019
- 2018
- [j9]Shusuke Kawai
An 802.11ax 4 × 4 High-Efficiency WLAN AP Transceiver SoC Supporting 1024-QAM With Frequency-Dependent IQ Calibration and Integrated Interference Analyzer. IEEE J. Solid State Circuits 53(12): 3688-3699 (2018) - [c5]Shusuke Kawai, Hiromitsu Aoyama, Rui Ito, Yutaka Shimizu, Mitsuyuki Ashida, Asuka Maki, Tomohiko Takeuchi, Hiroyuki Kobayashi, Go Urakawa, Hiroaki Hoshino, Shigehito Saigusa, Kazushi Koyama, Makoto Morita, Ryuichi Nihei, Daisuke Goto, Motoki Nagata, Kengo Nakata, Katsuyuki Ikeuchi, Kentaro Yoshioka
An 802.11ax 4×4 spectrum-efficient WLAN AP transceiver SoC supporting 1024QAM with frequency-dependent IQ calibration and integrated interference analyzer. ISSCC 2018: 442-444 - 2015
- [j8]Yuki Ando, Yukihito Ishida, Shinya Honda, Hiroaki Takada, Masato Edahiro:
Automatic Synthesis of Inter-heterogeneous-processor Communication for Programmable System-on-chip. Inf. Media Technol. 10(3): 415-419 (2015) - [j7]Yuki Ando, Yukihito Ishida, Shinya Honda, Hiroaki Takada, Masato Edahiro:
Automatic Synthesis of Inter-heterogeneous-processor Communication for Programmable System-on-chip. IPSJ Trans. Syst. LSI Des. Methodol. 8: 95-99 (2015) - [j6]Yuki Ando, Shinya Honda, Hiroaki Takada, Masato Edahiro:
System-level Design Method for Control Systems with Hardware-implemented Interrupt Handler. J. Inf. Process. 23(5): 532-541 (2015) - 2014
- [j5]Yuki Ando, Masataka Ogawa, Yuya Mizoguchi, Kouta Kumagai, Miaw Torng-Der, Shinya Honda:
A Case Study of FPGA Blokus Duo Solver by System-Level Design. SIGARCH Comput. Archit. News 42(4): 57-62 (2014) - [c4]Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada:
Fast Design-Space Exploration Method for SW/HW Codesign on FPGAs. FCCM 2014: 235 - 2013
- [c3]Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada:
Automated Identification of Performance Bottleneck on Embedded Systems for Design Space Exploration. IESS 2013: 171-180 - 2012
- [j4]Seiya Shibata, Yuki Ando, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada:
A Fast Performance Estimation Framework for System-Level Design Space Exploration. IPSJ Trans. Syst. LSI Des. Methodol. 5: 44-54 (2012) - 2011
- [c2]Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada:
Fast design space exploration for mixed hardware-software embedded systems. ISOCC 2011: 92-95 - 2010
- [j3]Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada:
Automatic Communication Synthesis with Hardware Sharing for Multi-Processor SoC Design. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(12): 2509-2516 (2010) - [j2]Seiya Shibata, Yuki Ando, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada:
Efficient Design Space Exploration at System Level with Automatic Profiler Instrumentation. Inf. Media Technol. 5(4): 1082-1096 (2010) - [j1]Seiya Shibata, Yuki Ando, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada:
Efficient Design Space Exploration at System Level with Automatic Profiler Instrumentation. IPSJ Trans. Syst. LSI Des. Methodol. 3: 179-193 (2010) - [c1]Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada:
Automatic communication synthesis with hardware sharing for design space exploration. ISCAS 2010: 1863-1866
Coauthor Index
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