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Chien-Hung Tsai
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2020 – today
- 2024
- [c21]Ming-Ching Hsu, Xuan-Fu Wu, Shang-Chien Yang, Yu-Qian Hong, Chien-Hung Tsai:
10MHz Half-Bridge GaN Driver IC with Dual-edge Dead-Time Control. GCCE 2024: 133-135 - [c20]Chun-Yu Chen, Yu-Qian Hong, Shang-Chien Yang, Ming-Ching Hsu, Chien-Hung Tsai:
A Digital PSR Flyback Adapter in CCM/DCM with Midpoint detection. GCCE 2024: 1173-1174 - 2023
- [c19]Lei Hsu, Jen-Chieh Cheng, Wei-Ting Yeh, Chien-Hung Tsai:
A Wide Load Range and Low Current Distortion Digital Boost PFC Converter With Mixed Conduction Mode Operation. GCCE 2023: 1168-1171 - [c18]Wei-Ting Yeh, Chung-Lun Chang, Shang-Chih Yin, Chien-Hung Tsai:
Mixed-Level Design Methodology With SystemVerilog Behavior Models for Digitally Controlled Power Converter ICs. GCCE 2023: 1172-1175 - [c17]Yi-Chen Jian, Kuan-Hua Lai, Jun-Wei Huang, Wei-Ting Yeh, Chien-Hung Tsai:
A Novel Cost Effective Variable On-Time Control of Digital Boost PFC Converter in Boundary Conduction Mode. GCCE 2023: 1176-1178 - 2022
- [j14]Chung-Chieh Wang, Chien-Hung Tsai, Ben Jong-Dao Jou, Shirley J. David, Alvin G. Pura
, Dong-In Lee, Kazuhisa Tsuboki, Ji-Sun Lee
Time-Lagged Ensemble Quantitative Precipitation Forecasts for Three Landfalling Typhoons in the Philippines Using the CReSS Model, Part II: Verification Using Global Precipitation Measurement Retrievals. Remote. Sens. 14(20): 5126 (2022) - 2021
- [j13]Kai-Yu Hu
Fully Digital Current Mode Constant On-Time Controlled Buck Converter With Output Voltage Offset Cancellation. IEEE Access 9: 162572-162580 (2021) - 2020
- [j12]Yi-Jing Lee
A Digital Power Factor Controller for Primary-Side-Regulated LED Driver. IEEE Access 8: 21813-21822 (2020) - [j11]Yin-Di Yang
Digital Battery Management Design for Point-of-Load Applications With Cell Balancing. IEEE Trans. Ind. Electron. 67(8): 6365-6375 (2020)
2010 – 2019
- 2019
- [c16]Guan-Shen Yao, Yi-Yang Tsai, Kai-Yu Hu, Chun-Yu Chen, Kuan-Hua Lai, Chien-Hung Tsai:
All-Digital Current-Sensorless Multi-Mode DC-DC Converter for Battery Powered Applications. GCCE 2019: 1144-1145 - 2018
- [c15]Kai-Yu Hu, Yu-Sin Chen, Chien-Hung Tsai:
A Digital Multiphase Converter with Sensor-less Current and Thermal Balance Mechanism. A-SSCC 2018: 175-178 - [c14]Kai-Yu Hu, Yu-Huang Chen, Heng-Ci Lin, Chien-Hung Tsai:
Digital Buck Converter with Adaptive Driving Circuit for Cascode Power MOS. GCCE 2018: 126-127 - [c13]Yi-Hua Chang, Kai-Yu Hu, Guan-Shen Yao, Chun-Yu Chen, Chien-Hung Tsai:
Mixed-Level Design Methodology for Digitally Controlled Power Converter IC. GCCE 2018: 811-812 - [c12]Chun-Ping Niou, Chien-Hung Tsai, Ta-Jin Chen:
A digital peak current delay compensation for primary-side regulation flyback adapter. VLSI-DAT 2018: 1-4 - 2017
- [j10]Chien-Hung Tsai, Chi-Yuan Huang, Jhih-Sian Guo, Chen-Yu Wang:
Quasi-V2 hysteretic control boost DC-DC regulator with synthetic current ripple technique. Int. J. Circuit Theory Appl. 45(4): 571-591 (2017) - [j9]Yi-Yang Tsai, Yu-Shin Tsai, Chien-Wu Tsai
Digital Noninverting-Buck-Boost Converter With Enhanced Duty-Cycle-Overlap Control. IEEE Trans. Circuits Syst. II Express Briefs 64-II(1): 41-45 (2017) - [c11]Kai-Yu Hu, Bo-Ming Chen, Chien-Hung Tsai:
A digitally controlled buck converter with current sensor-less adaptive voltage positioning (AVP) mechanism. VLSI-DAT 2017: 1-4 - 2016
- [c10]Liang-Ying Lu, Ching-Yao Chang, Zhao-Hong Chen, Bo-Ting Yeh, Tai-Hua Lu, Peng-Yu Chen, Pin-Hao Tang, Kuen-Jong Lee, Lih-Yih Chiou, Soon-Jyh Chang, Chien-Hung Tsai, Chung-Ho Chen, Jai-Ming Lin:
A testable and debuggable dual-core system with thermal-aware dynamic voltage and frequency scaling. ASP-DAC 2016: 17-18 - [c9]Kai-Yu Hu, Yi-Yang Tsai, Sheng-Ming Wang, Chien-Hung Tsai:
High power factor boost PFC controller with feedforward adaptive on-time control. GCCE 2016: 1-2 - 2015
- [j8]Kai-Yu Hu, Shih-Mei Lin, Chien-Hung Tsai:
A Fixed-Frequency Quasi-${\rm V}^{2}$ Hysteretic Buck Converter With PLL-Based Two-Stage Adaptive Window Control. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(10): 2565-2573 (2015) - [j7]Chien-Hung Tsai, Yu-Shin Tsai, Han-Chien Liu:
A Stable Mode-Transition Technique for a Digitally Controlled Non-Inverting Buck-Boost DC-DC Converter. IEEE Trans. Ind. Electron. 62(1): 475-483 (2015) - 2014
- [j6]Chien-Hung Tsai, Chun-Hung Yang
Design and implementation of a digitally controlled single-inductor dual-output (SIDO) buck converter. Int. J. Circuit Theory Appl. 42(3): 221-237 (2014) - [c8]Jing-Teng Lin, Jiunn-Hung Shiau, Chien-Hung Tsai:
A fast transient and under/overshoot suppression DC-DC Buck converter with ACP control. VLSI-DAT 2014: 1-4 - 2013
- [j5]Chien-Hung Tsai, Chun-Hung Yang
A Digitally Controlled Switching Regulator With Reduced Conductive EMI Spectra. IEEE Trans. Ind. Electron. 60(9): 3938-3947 (2013) - [c7]Hsin-Lun Li, Chia-Cheng Pao, Bo-Ming Chen, Chien-Hung Tsai:
AOT-controlled dual-mode AVP buck regulator with AEAF mechanism. CICC 2013: 1-4 - [c6]Chen-Yu Wang, Jhih-Sian Guo, Chi-Yuan Huang, Chien-Hung Tsai:
A high effieciency DC/DC boost regulator with adaptive off/on-time control. VLSI-DAT 2013: 1-4 - [c5]Bo-Ting Yeh, Chun-Hung Yang, Kai-Cheung Juang, Chien-Hung Tsai:
Sensorless dead-time exploration for digitally controlled switching converters. VLSI-DAT 2013: 1-4 - 2012
- [j4]Jia-Hui Wang, Chien-Hung Tsai, Sheng-Wen Lai:
A Low-Dropout Regulator With Tail Current Control for DPWM Clock Correction. IEEE Trans. Circuits Syst. II Express Briefs 59-II(1): 45-49 (2012) - 2011
- [j3]Chien-Hung Tsai, Jia-Hui Wang:
Capacitor-less low-dropout regulator with slew-rate-enhanced circuit. IET Circuits Devices Syst. 5(5): 384-391 (2011) - [c4]Chun-Sheng Huang, Chen-Yu Wang, Jia-Hui Wang, Chien-Hung Tsai:
A fast-transient quasi-V2 switching buck regulator using AOT control. A-SSCC 2011: 53-56 - 2010
- [j2]Chien-Hung Tsai, Jia-Hui Wang, Hao-Yuan Zheng, Chin-Tien Chang, Chen-Yu Wang:
A new compact low-offset push-pull output buffer with current positive feedback for a 10-bit LCD source driver. IET Circuits Devices Syst. 4(6): 539-547 (2010)
2000 – 2009
- 2009
- [c3]Hao-Yuan Zheng, Jia-Hui Wang, Chien-Hung Tsai, Chin-Tien Chang, Ching-Chung Lee, Chen-Yu Wang:
Area-efficient R-C DACs with Low-offset Push-pull Output Buffers for a 10-bit LCD Source Driver. ISCAS 2009: 1597-1600 - [c2]Pui-Kei Leong, Chun-Hung Yang, Chi-Wai Leng, Chien-Hung Tsai:
Design and Implementation of Sigma-delta DPWM Controller for Switching Converter. ISCAS 2009: 3074-3077 - 2008
- [j1]Chia-Ling Wei
A Versatile Step-Up/Step-Down Switched-Capacitor-Based DC-DC Converter. IEICE Trans. Electron. 91-C(5): 809-812 (2008) - [c1]Hung-Yuan Chu, Chun-Hung Yang, Chi-Wai Leng, Chien-Hung Tsai:
A top-down, mixed-level design methodology for CT BP ΔΣ modulator using verilog-A. APCCAS 2008: 1390-1393
Coauthor Index
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