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Paul Leroux
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- affiliation: Catholic University of Leuven, Belgium
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2020 – today
- 2024
- [c17]Zheyi Li, Laurent Berti, Qiuyang Lin, Jinghao Zhao
, Maxim Gorbunov
An 80MS/s 70.79dB-SNDR 60.7fJ/Conv-Step Radiation-Tolerant Semi-Time-interleaved Pipelined-SAR ADC. CICC 2024: 1-2 - [c16]Jinghao Zhao
A 10 MS/s 12-bit Cryogenic SAR ADC in 22nm FD SOI for Quantum Computing. NewCAS 2024: 60-64 - 2023
- [c15]Zheyi Li
A CDAC Mismatch Calibration Technique for SAR-assisted Pipeline ADCs. NEWCAS 2023: 1-5 - 2021
- [j12]Bjorn Van Bockel
Tradeoffs in Time-to-Digital Converter Architectures for Harsh Radiation Environments. IEEE Trans. Instrum. Meas. 70: 1-10 (2021) - [c14]Arijit Karmakar
A 0.18 pJ/Step Time-Domain 1st Order ΔΣ Capacitance-to-Digital Converter in 65-nm CMOS. ISCAS 2021: 1-5 - [c13]Arijit Karmakar
Pseudo-Differential Time-Domain Integrator Using Charge-Based Time-Domain Circuits. LASCAS 2021: 1-4 - 2020
- [j11]Stefan Biereigel
A Low Noise Fault Tolerant Radiation Hardened 2.56 Gbps Clock-Data Recovery Circuit With High Speed Feed Forward Correction in 65 nm CMOS. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. 67-I(5): 1438-1446 (2020) - [c12]S. Guagliardo, Frederic Wrobel
Effect of Temperature on Single Event Latchup Sensitivity. DTIS 2020: 1-5
2010 – 2019
- 2019
- [j10]Jurgen Vanhamel
Practical Driving Electronics for an AOTF-Based NO2 Camera. IEEE Trans. Instrum. Meas. 68(3): 874-881 (2019) - [c11]Jeffrey Prinzie
A Low Noise Fault Tolerant Radiation Hardened 2.56 Gbps Clock-Data Recovery Circuit with High Speed Feed Forward Correction in 65 nm CMOS. LASCAS 2019: 63-66 - 2018
- [j9]Ygor Q. Aguiar
Analysis of the charge sharing effect in the SET sensitivity of bulk 45 nm standard cell layouts under heavy ions. Microelectron. Reliab. 88-90: 920-924 (2018) - 2017
- [j8]Bram Faes
Highly Tunable Triangular Wave UWB Baseband Pulse Generator With Amplitude Stabilization in 40-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 64-II(5): 505-509 (2017) - 2016
- [j7]Jeffrey Prinzie
A Self-Calibrated Bang-Bang Phase Detector for Low-Offset Time Signal Processing. IEEE Trans. Circuits Syst. II Express Briefs 63-II(5): 453-457 (2016) - [c10]Jeffrey Prinzie
A single-event upset robust, 2.2 GHz to 3.2 GHz, 345 fs jitter PLL with triple-modular redundant phase detector in 65 nm CMOS. A-SSCC 2016: 285-288 - 2015
- [j6]Jurgen Vanhamel
RF-driving of acoustic-optical tunable filters; design, realization and qualification of analog and digital modules for ESA. Microelectron. Reliab. 55(9-10): 2103-2107 (2015) - [j5]Maarten Strackx, Emiliano D'Agostino, Paul Leroux
Direct RF Subsampling Receivers Enabling Impulse-Based UWB Signals for Breast Cancer Detection. IEEE Trans. Circuits Syst. II Express Briefs 62-II(2): 144-148 (2015) - [j4]Carmine Garripoli, Marco Mercuri
Embedded DSP-Based Telehealth Radar System for Remote In-Door Fall Detection. IEEE J. Biomed. Health Informatics 19(1): 92-101 (2015) - [c9]Bram Faes, Jeffrey Prinzie
Experimental validation of a compact model for EM reflection and transmission in multi-layered structures. I2MTC 2015: 905-909 - [c8]Bram Faes, Patrick Reynaert
A 280 ps - 7.5 ns UWB Pulse Generator with Amplitude Compensation in 40 nm CMOS. ICUWB 2015: 1-4 - 2014
- [c7]Marco Mercuri
Healthcare System for Non-invasive Fall Detection in Indoor Environment. ApplePies 2014: 145-152 - 2013
- [c6]Ying Cao, Paul Leroux
A 63, 000 Q-factor relaxation oscillator with switched-capacitor integrated error feedback. ISSCC 2013: 186-187 - 2012
- [j3]Ying Cao, Wouter De Cock, Michiel Steyaert
1-1-1 MASH Δ Σ Time-to-Digital Converters With 6 ps Resolution and Third-Order Noise-Shaping. IEEE J. Solid State Circuits 47(9): 2093-2106 (2012) - 2011
- [c5]Ying Cao, Paul Leroux
A 0.7mW 13b temperature-stable MASH ΔΣ TDC with delay-line assisted calibration. A-SSCC 2011: 361-364 - [c4]Ying Cao, Paul Leroux
A 1.7mW 11b 1-1-1 MASH ΔΣ time-to-digital converter. ISSCC 2011: 480-482
2000 – 2009
- 2005
- [j2]Vesselin K. Vassilev, Steven Thijs, P. L. Segura, Piet Wambacq, Paul Leroux
ESD-RF co-design methodology for the state of the art RF-CMOS blocks. Microelectron. Reliab. 45(2): 255-268 (2005) - 2004
- [c3]Carolien Hermans, Paul Leroux, Michiel Steyaert
Two high-speed optical front-ends with integrated photodiodes in standard 0.18 μm CMOS. ESSCIRC 2004: 275-278 - [c2]Paul Leroux, Michiel Steyaert
A 5 GHz CMOS low-noise amplifier with inductive ESD protection exceeding 3 kV HBM. ESSCIRC 2004: 295-298 - 2002
- [j1]Paul Leroux
A 0.8-dB NF ESD-Protected 9-mW CMOS LNA operating at 1.23 GHz [for GPS receiver]. IEEE J. Solid State Circuits 37(6): 760-765 (2002) - [c1]Peter J. Vancorenland, Philippe Coppejans, Wouter De Cock, Paul Leroux
Optimization of a fully integrated low power CMOS GPS receiver. ICCAD 2002: 305-308
Coauthor Index
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