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Davide Rossetti
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2020 – today
- 2022
- [i10]Roberto Ammendola, Andrea Biagioni, Ottorino Frezza, Alessandro Lonardo, Francesca Lo Cicero, Michele Martinelli, Pier Stanislao Paolucci, Elena Pastorelli, Davide Rossetti, Francesco Simula, Laura Tosoratto, Piero Vicini:
Architectural improvements and technological enhancements for the APEnet+ interconnect system. CoRR abs/2201.01088 (2022) - 2021
- [j7]Massimo Bernaschi
, Elena Agostini
Benchmarking multi-GPU applications on modern multi-GPU integrated systems. Concurr. Comput. Pract. Exp. 33(14) (2021)
2010 – 2019
- 2018
- [j6]Elena Agostini, Davide Rossetti, Sreeram Potluri:
GPUDirect Async: Exploring GPU synchronous communication techniques for InfiniBand clusters. J. Parallel Distributed Comput. 114: 28-45 (2018) - 2017
- [c14]Elena Agostini, Davide Rossetti, Sreeram Potluri:
Offloading communication control logic in GPU accelerated applications. CCGrid 2017: 248-257 - [c13]Sreeram Potluri, Anshuman Goswami, Davide Rossetti, Chris J. Newburn, Manjunath Gorentla Venkata
GPU-Centric Communication on NVIDIA GPU Clusters with InfiniBand: A Case Study with OpenSHMEM. HiPC 2017: 253-262 - [c12]Akshay Venkatesh, Khaled Hamidouche, Sreeram Potluri, Davide Rossetti, Ching-Hsiang Chu
MPI-GDS: High Performance MPI Designs with GPUDirect-aSync for CPU-GPU Control Flow Decoupling. ICPP 2017: 151-160 - 2016
- [j5]Pier Stanislao Paolucci
Dynamic many-process applications on many-tile embedded systems and HPC clusters: The EURETILE programming environment and execution platforms. J. Syst. Archit. 69: 29-53 (2016) - 2015
- [j4]Roberto Ammendola
A hierarchical watchdog mechanism for systemic fault awareness on distributed systems. Future Gener. Comput. Syst. 53: 90-99 (2015) - [j3]Roberto Ammendola
ASIP acceleration for virtual-to-physical address translation on RDMA-enabled FPGA-based network interfaces. Future Gener. Comput. Syst. 53: 109-118 (2015) - [c11]Pavel Shamis, Manjunath Gorentla Venkata
UCX: An Open Source Framework for HPC Network APIs and Beyond. Hot Interconnects 2015: 40-43 - [c10]Sreeram Potluri, Davide Rossetti, Donald Becker, Duncan Poole, Manjunath Gorentla Venkata, Oscar R. Hernandez, Pavel Shamis, M. Graham Lopez
Exploring OpenSHMEM Model to Program GPU-based Extreme-Scale Systems. OpenSHMEM 2015: 18-35 - 2014
- [c9]Rong Shi, Sreeram Potluri, Khaled Hamidouche, Jonathan L. Perkins, Mingzhe Li, Davide Rossetti, Dhabaleswar K. Panda:
Designing efficient small message transfer mechanism for inter-node MPI communication on InfiniBand GPU clusters. HiPC 2014: 1-10 - [c8]Roberto Ammendola
LO-FA-MO: Fault Detection and Systemic Awareness for the QUonG Computing System. SRDS 2014: 265-270 - [i9]Alessandro Lonardo, F. Ameli, Roberto Ammendola, Andrea Biagioni
NaNet: a Low-Latency, Real-Time, Multi-Standard Network Interface Card with GPUDirect Features. CoRR abs/1406.3568 (2014) - 2013
- [j2]Massimo Bernaschi, Mauro Bisson, Davide Rossetti:
Benchmarking of communication techniques for GPUs. J. Parallel Distributed Comput. 73(2): 250-255 (2013) - [c7]Roberto Ammendola
Virtual-to-Physical address translation for an FPGA-based interconnect with host and GPU remote DMA capabilities. FPT 2013: 58-65 - [c6]Roberto Ammendola
GPU Peer-to-Peer Techniques Applied to a Cluster Interconnect. IPDPS Workshops 2013: 806-815 - [c5]Roberto Ammendola
Design and implementation of a modular, low latency, fault-aware, FPGA-based network interface. ReConFig 2013: 1-6 - [i8]Roberto Ammendola, Andrea Biagioni
'Mutual Watch-dog Networking': Distributed Awareness of Faults and Critical Events in Petascale/Exascale systems. CoRR abs/1307.0433 (2013) - [i7]Roberto Ammendola, Andrea Biagioni, Ottorino Frezza, Werner Geurts, Gert Goossens, Francesca Lo Cicero, Alessandro Lonardo, Pier Stanislao Paolucci, Davide Rossetti, Francesco Simula, Laura Tosoratto, Piero Vicini
A heterogeneous many-core platform for experiments on scalable custom interconnects and management of fault and critical events, applied to many-process applications: Vol. II, 2012 technical report. CoRR abs/1307.1270 (2013) - [i6]Roberto Ammendola, Massimo Bernaschi, Andrea Biagioni, Mauro Bisson, Massimiliano Fatica, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Enrico Mastrostefano, Pier Stanislao Paolucci, Davide Rossetti, Francesco Simula, Laura Tosoratto, Piero Vicini:
GPU peer-to-peer techniques applied to a cluster interconnect. CoRR abs/1307.8276 (2013) - [i5]Roberto Ammendola, Andrea Biagioni, Ottorino Frezza, Francesca Lo Cicero, Pier Stanislao Paolucci, Alessandro Lonardo, Davide Rossetti, Francesco Simula, Laura Tosoratto, Piero Vicini:
Architectural improvements and 28 nm FPGA implementation of the APEnet+ 3D Torus network for hybrid HPC systems. CoRR abs/1311.1741 (2013) - [i4]Roberto Ammendola, Andrea Biagioni, Ottorino Frezza, G. Lamanna, Alessandro Lonardo, Francesca Lo Cicero, Pier Stanislao Paolucci, F. Pantaleo, Davide Rossetti, Francesco Simula, M. Sozzi, Laura Tosoratto, Piero Vicini:
NaNet: a flexible and configurable low-latency NIC for real-time trigger systems based on GPUs. CoRR abs/1311.4007 (2013) - 2012
- [c4]Massimo Bernaschi, Mauro Bisson, Enrico Mastrostefano, Davide Rossetti:
Breadth First Search on APEnet+. SC Companion 2012: 248-253 - [i3]Andrea Biagioni
The Distributed Network Processor: a novel off-chip and on-chip interconnection network architecture. CoRR abs/1203.1536 (2012) - 2011
- [i2]Roberto Ammendola, Andrea Biagioni, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Pier Stanislao Paolucci, Davide Rossetti, Andrea Salamon, Gaetano Salina, Francesco Simula, Laura Tosoratto, Piero Vicini:
APEnet+: high bandwidth 3D torus direct network for petaflops scale commodity clusters. CoRR abs/1102.3796 (2011) - 2010
- [i1]Roberto Ammendola, Andrea Biagioni, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Pier Stanislao Paolucci
APEnet+: a 3D toroidal network enabling Petaflops scale Lattice QCD simulations on commodity clusters. CoRR abs/1012.0253 (2010)
2000 – 2009
- 2009
- [c3]Alexandre Chagoya-Garzon, Xavier Guerin, Frédéric Rousseau, Frédéric Pétrot, Davide Rossetti, Alessandro Lonardo, Piero Vicini
Synthesis of Communication Mechanisms for Multi-tile Systems Based on Heterogeneous Multi-processor System-On-Chips. IEEE International Workshop on Rapid System Prototyping 2009: 48-54 - 2006
- [j1]Francesco Belletti, Sebastiano Fabio Schifano
Computing for LQCD: apeNEXT. Comput. Sci. Eng. 8(1): 18-29 (2006) - 2004
- [c2]Roberto Ammendola
APENet: a high speed, low latency 3D interconnect network. CLUSTER 2004: 481
1990 – 1999
- 1997
- [c1]F. Aglietti, A. Bartolini, Claudia Battista, Simone Cabasino, M. Cosimi, A. Michelotti, A. Monello, Emanuele Panizzi
The Teraflop Parallel Computer APEmille. HPCN Europe 1997: 991-993
Coauthor Index
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