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Hsun-Cheng Lee
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2010 – 2019
- 2015
- [j2]Hsun-Cheng Lee, Jacob A. Abraham:
Digital Calibration for 8-bit Delay Line ADC Using Harmonic Distortion Correction. J. Electron. Test. 31(2): 127-138 (2015) - 2014
- [c6]Hsun-Cheng Lee, Jacob A. Abraham:
A novel low power 11-bit hybrid ADC using flash and delay line architectures. DATE 2014: 1-4 - [c5]Hsun-Cheng Lee, Jacob A. Abraham:
Harmonic distortion correction for 8-bit delay line ADC using gray code. LATW 2014: 1-4 - 2013
- [c4]Hsun-Cheng Lee, Jacob A. Abraham:
Digital Calibration for 8-Bit Delay Line ADC Using Harmonic Distortion Correction. Asian Test Symposium 2013: 128-133 - 2012
- [c3]Chin-Cheng Hu, Chin-Wei Lin, Hsun-Cheng Lee, Ching-Sheu Wang:
An innovative scheme for the UNI interworking of ASON and GMPLS. WOCC 2012: 25-26
2000 – 2009
- 2007
- [j1]Hsun-Cheng Lee, Yao-Wen Chang
, Hannah Honghua Yang:
MBast-Tree: A Multilevel Floorplanner for Large-Scale Building-Module Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(8): 1430-1444 (2007) - 2003
- [c2]Hsun-Cheng Lee, Yao-Wen Chang, Jer-Ming Hsu, Hannah Honghua Yang:
Multilevel floorplanning/placement for large-scale modules using B*-trees. DAC 2003: 812-817 - 2000
- [c1]Hsun-Cheng Lee, Ting-Chi Wang:
Feasible two-way circuit partitioning with complex resource constraints. ASP-DAC 2000: 435-440
Coauthor Index
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