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Dong-U Lee
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2010 – 2019
- 2015
- [j19]Lok-Won Kim, Dong-U Lee, John D. Villasenor:
Automated Iterative Pipelining for ASIC Design. ACM Trans. Design Autom. Electr. Syst. 20(2): 28:1-28:24 (2015) - 2012
- [j18]Dong-U Lee, Lok-Won Kim, John D. Villasenor:
Precision-Aware Self-Quantizing Hardware Architectures for the Discrete Wavelet Transform. IEEE Trans. Image Process. 21(2): 768-777 (2012)
2000 – 2009
- 2009
- [j17]Dong-U Lee, John D. Villasenor:
Optimized Custom Precision Function Evaluation for Embedded Processors. IEEE Trans. Computers 58(1): 46-59 (2009) - [j16]Dong-U Lee, Hyungjin Kim, Mohammad H. Rahimi, Deborah Estrin, John D. Villasenor:
Energy-Efficient Image Compression for Resource-Constrained Platforms. IEEE Trans. Image Process. 18(9): 2100-2113 (2009) - [j15]Dong-U Lee, Ray C. C. Cheung
, Wayne Luk, John D. Villasenor:
Hierarchical Segmentation for Hardware Function Evaluation. IEEE Trans. Very Large Scale Integr. Syst. 17(1): 103-116 (2009) - 2008
- [j14]Hyungjin Kim, Dong-U Lee, John D. Villasenor:
Design Tradeoffs and Hardware Architecture for Real-Time Iterative MIMO Detection using Sphere Decoding and LDPC Coding. IEEE J. Sel. Areas Commun. 26(6): 1003-1014 (2008) - [j13]Hyungjin Kim, Mohammad H. Rahimi, Dong-U Lee, Deborah Estrin, John D. Villasenor:
Energy-Aware High Resolution Image Acquisition via Heterogeneous Image Sensors. IEEE J. Sel. Top. Signal Process. 2(4): 526-537 (2008) - [j12]Dong-U Lee, Ray C. C. Cheung
Hardware Implementation Trade-Offs of Polynomial Approximations and Interpolations. IEEE Trans. Computers 57(5): 686-701 (2008) - [j11]Dong-U Lee, Hyungjin Kim, Christopher R. Jones, John D. Villasenor:
Pilotless Frame Synchronization for LDPC-Coded Transmission Systems. IEEE Trans. Signal Process. 56(7-1): 2865-2874 (2008) - 2007
- [j10]Dong-U Lee, Hyungjin Kim, Christopher R. Jones, John D. Villasenor:
Pilotless Frame Synchronization via LDPC Code Constraint Feedback. IEEE Commun. Lett. 11(8): 683-685 (2007) - [j9]Dong-U Lee, John D. Villasenor:
A Bit-Width Optimization Methodology for Polynomial-Based Function Evaluation. IEEE Trans. Computers 56(4): 567-571 (2007) - [j8]Dong-U Lee, Ray C. C. Cheung
A Flexible Architecture for Precise Gamma Correction. IEEE Trans. Very Large Scale Integr. Syst. 15(4): 474-478 (2007) - [j7]Ray C. C. Cheung
Hardware Generation of Arbitrary Random Number Distributions From Uniform Distributions Via the Inversion Method. IEEE Trans. Very Large Scale Integr. Syst. 15(8): 952-962 (2007) - [c13]Dong-U Lee, Hyungjin Kim, Steven Tu, Mohammad H. Rahimi, Deborah Estrin, John D. Villasenor:
Energy-optimized image communication on resource-constrained sensor platforms. IPSN 2007: 216-225 - 2006
- [j6]Dong-U Lee, Esteban L. Vallés, John D. Villasenor, Christopher R. Jones:
Joint LDPC decoding and timing recovery using code constraint feedback. IEEE Commun. Lett. 10(3): 189-191 (2006) - [j5]Dong-U Lee, John D. Villasenor, Wayne Luk, Philip Heng Wai Leong
A Hardware Gaussian Noise Generator Using the Box-Muller Method and Its Error Analysis. IEEE Trans. Computers 55(6): 659-671 (2006) - [j4]Dong-U Lee, Altaf Abdul Gaffar, Ray C. C. Cheung
Accuracy-Guaranteed Bit-Width Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(10): 1990-2000 (2006) - [c12]Dong-U Lee, Ray C. C. Cheung
Inversion-based hardware gaussian random number generator: A case study of function evaluation via hierarchical segmentation. FPT 2006: 33-40 - 2005
- [j3]Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk:
Optimizing Hardware Function Evaluation. IEEE Trans. Computers 54(12): 1520-1531 (2005) - [j2]Dong-U Lee, Wayne Luk, John D. Villasenor, Guanglie Zhang, Philip Heng Wai Leong
A hardware Gaussian noise generator using the Wallace method. IEEE Trans. Very Large Scale Integr. Syst. 13(8): 911-920 (2005) - [c11]Ray C. C. Cheung, Dong-U Lee, Oskar Mencer, Wayne Luk, Peter Y. K. Cheung:
Automating custom-precision function evaluation for embedded processors. CASES 2005: 22-31 - [c10]Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk:
MiniBit: bit-width optimization via affine arithmetic. DAC 2005: 837-840 - [c9]Guanglie Zhang, Philip Heng Wai Leong
Ziggurat-based Hardware Gaussian Random Number Generator. FPL 2005: 275-280 - [c8]Guanglie Zhang, Philip Heng Wai Leong, Chun Hok Ho, Kuen Hung Tsoi, Chris C. C. Cheung, Dong-U Lee, Ray C. C. Cheung, Wayne Luk:
Reconfigurable Acceleration for Monte Carlo Based Financial Simulation. FPT 2005: 215-222 - 2004
- [b1]Dong-U Lee:
Hardware designs for function evaluation and LDPC coding. Imperial College London, UK, 2004 - [j1]Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y. K. Cheung:
A Gaussian Noise Generator for Hardware-Based Simulations. IEEE Trans. Computers 53(12): 1523-1534 (2004) - [c7]Dong-U Lee, Wayne Luk, Connie Wang, Christopher R. Jones, Michael Smith, John D. Villasenor:
A Flexible Hardware Encoder for Low-Density Parity-Check Codes. FCCM 2004: 101-111 - [c6]Dong-U Lee, Oskar Mencer, David J. Pearce, Wayne Luk:
Automating Optimized Table-with-Polynomial Function Evaluation for FPGAs. FPL 2004: 364-373 - [c5]Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk:
Adaptive range reduction for hardware function evaluation. FPT 2004: 169-176 - 2003
- [c4]Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y. K. Cheung:
A Hardware Gaussian Noise Generator for Channel Code Evaluation. FCCM 2003: 69- - [c3]Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y. K. Cheung:
Non-uniform Segmentation for Hardware Function Evaluation. FPL 2003: 796-807 - [c2]Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y. K. Cheung:
Hierarchical segmentation schemes for function evaluation. FPT 2003: 92-99 - 2002
- [c1]Dong-U Lee, T. K. Lee, Wayne Luk, Peter Y. K. Cheung:
Incremental programming for reconfigurable engines. FPT 2002: 411-415
Coauthor Index
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