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Chung-Hsun Huang
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2020 – today
- 2023
- [j14]Tsung-Hsien Liu, Junzhe Chi, Bo-Lin Wu, Yee-Shao Chen, Chung-Hsun Huang, Yuan-Sun Chu
:
Design and Implementation of Machine Tool Life Inspection System Based on Sound Sensing. Sensors 23(1): 284 (2023) - 2020
- [j13]Chung-Hsun Huang
A High-Performance LDO Regulator Enabling Low-Power SoC With Voltage Scaling Approaches. IEEE Trans. Very Large Scale Integr. Syst. 28(5): 1141-1149 (2020) - [c11]Tzu-Hsiu Chen, Chung-Hsun Huang, Yuan-Sun Chu, Bo-Chao Cheng:
Towards Efficient Neural Network on Edge Devices via Statistical Weight Pruning. GCCE 2020: 192-193 - [c10]Tzu-Hsiu Chen, Chung-Hsun Huang, Yuan-Sun Chu:
Lightweight Super-resolution Learning Model for Extremely Exposed Images. ICCBN 2020: 58-62
2010 – 2019
- 2018
- [c9]Kai-Tse Cheng, Chung-Hsun Huang, Yuan-Sun Chu, Bo-Chao Cheng, Pin-Sheng Cheng Chou:
Low Cost Super-Resolution Scaling for Images with Over-Exposed and Saturated Scenes. GCCE 2018: 545-546 - 2016
- [j12]Chung-Hsun Huang, Chao-Yang Chang:
An area and power efficient adder-based stepwise linear interpolation for digital signal processing. IEEE Trans. Consumer Electron. 62(1): 69-75 (2016) - [c8]Chao-Yang Chang, Chung-Hsun Huang, Hui-Fu Chen, Chingwei Yeh, Yuan-Sun Chu, Tay-Jyi Lin:
A low complexity edge-preserved image compression algorithm for LCD overdrive. GCCE 2016: 1-2 - 2014
- [j11]Chung-Hsun Huang, Wei-Chen Liao:
A compact programmable LDO regulator for ultra-low voltage SoC. IEICE Electron. Express 11(20): 20140820 (2014) - [j10]Chung-Hsun Huang, Wei-Chen Liao, Chih-Ming Liao:
A low-voltage high PSR LDO regulator with a simple ripple cancellation technique. IEICE Electron. Express 11(20): 20140906 (2014) - [j9]Chung-Hsun Huang, Ying-Ting Ma, Wei-Chen Liao:
Design of a Low-Voltage Low-Dropout Regulator. IEEE Trans. Very Large Scale Integr. Syst. 22(6): 1308-1313 (2014) - [c7]Chung-Hsun Huang, Wei-Jen Chen, Keng-Jui Chang, Yi-Hsuan Ting, Keng-Chang Hsu, Yu-Fu Pan, Chao-Chun Chen, Yuan-Hua Chu, Tay-Jyi Lin, Jinn-Shyan Wang:
Low power fixed-latency DSP accelerator with autonomous minimum energy tracking (AMET). Hot Chips Symposium 2014: 1 - 2013
- [c6]Yi-Mao Hsiao, Yuan-Sun Chu, Chao-Yang Chang, Chung-Hsun Huang, Hsi-Hsun Yeh:
A high throughput ASIC design for IPv6 routing lookup system. ISCAS 2013: 505-508 - [c5]Chao-Yang Chang, Chung-Hsun Huang, Yuan-Sun Chu:
Efficient memory access methods for framebuffer-less video processing applications. ISCAS 2013: 3026-3029 - 2012
- [j8]Yi-Mao Hsiao, Ming-Jen Chen, Yuan-Sun Chu, Chung-Hsun Huang:
High-throughput intrusion detection system with parallel pattern matching. IEICE Electron. Express 9(18): 1467-1472 (2012) - [c4]Chao-Yang Chang, Pai-Cheng Tso, Chung-Hsun Huang, Po-Hui Yang:
A fast wake-up power gating technique with inducing a balanced rush current. ISCAS 2012: 3086-3089 - 2011
- [j7]Chung-Hsun Huang, Chao-Chun Chen:
A fast and high efficiency buck converter with Switch-On-Demand Modulator for wide load range applications. IEICE Electron. Express 8(12): 963-968 (2011) - [j6]Chung-Hsun Huang, Tzung-Lin Wu, Yi-Ming Wang:
Adaptive Pseudo Dual Keeper for Wide Fan-In Dynamic Circuits. IEEE Trans. Circuits Syst. II Express Briefs 58-II(10): 672-676 (2011) - [j5]Chung-Hsun Huang, Chao-Yang Chang:
Low power and cost effective scaling engine with locking frame rate for display controllers. IEEE Trans. Consumer Electron. 57(2): 305-312 (2011) - [c3]Jinn-Shyan Wang, Yung-Chen Chien, Jia-Hong Lin, Chun-Yuan Cheng, Ying-Ting Ma, Chung-Hsun Huang:
ADDLL/VDD-biasing co-design for process characterization, performance calibration, and clock synchronization in variation-tolerant designs. ASICON 2011: 47-50 - [c2]Yi-Ming Wang, Jen-Tsung Yu, Yuandi Surya, Chung-Hsun Huang:
A compact delay-recycled clock skew-compensation and/or duty-cycle-correction circuit. SoCC 2011: 42-47
2000 – 2009
- 2004
- [j4]Chung-Hsun Huang, Jinn-Shyan Wang, Chingwei Yeh, Chih-Jen Fang:
The CMOS carry-forward adders. IEEE J. Solid State Circuits 39(2): 327-336 (2004) - 2003
- [j3]Chung-Hsun Huang, Jinn-Shyan Wang:
High-performance and power-efficient CMOS comparators. IEEE J. Solid State Circuits 38(2): 254-262 (2003) - 2002
- [j2]Chung-Hsun Huang, Jinn-Shyan Wang, Yan-Chao Huang:
Design of high-performance CMOS priority encoders and incrementer/decrementers using multilevel lookahead and multilevel folding techniques. IEEE J. Solid State Circuits 37(1): 63-76 (2002) - 2001
- [c1]Chung-Hsun Huang, Jinn-Shyan Wang, Yan-Chao Huang:
A high-speed CMOS incrementer/decrementer. ISCAS (4) 2001: 88-91 - 2000
- [j1]Jinn-Shyan Wang, Chung-Hsun Huang:
High-speed and low-power CMOS priority encoders. IEEE J. Solid State Circuits 35(10): 1511-1514 (2000)
Coauthor Index
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