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Sunan Zou
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2020 – today
- 2024
- [j1]Sunan Zou, Jiaxi Zhang, Bizhao Shi, Guojie Luo:
PowerSyn: A Logic Synthesis Framework With Early Power Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(1): 203-216 (2024) - [c4]Sunan Zou, Guojie Luo:
PONO: Power Optimization with Near Optimal SMT-based Sub-circuit Generation. DAC 2024: 41:1-41:6 - [c3]Sunan Zou, Jiaxi Zhang, Bizhao Shi, Guojie Luo:
BESWAC: Boosting Exact Synthesis via Wiser SAT Solver Call. DATE 2024: 1-6 - [c2]Bizhao Shi, Tuo Dai, Sunan Zou, Xinming Wei, Guojie Luo:
ImageMap: Enabling Efficient Mapping from Image Processing DSL to CGRA. Euro-Par (1) 2024: 61-76 - [c1]Sunan Zou, Jiaxi Zhang, Guojie Luo:
Incremental SAT-based Exact Synthesis. ACM Great Lakes Symposium on VLSI 2024: 158-163 - [i1]Lei Chen, Yiqi Chen, Zhufei Chu, Wenji Fang, Tsung-Yi Ho, Yu Huang, Sadaf Khan, Min Li, Xingquan Li, Yun Liang, Yibo Lin, Jinwei Liu, Yi Liu, Guojie Luo, Zhengyuan Shi, Guangyu Sun, Dimitrios Tsaras, Runsheng Wang, Ziyi Wang, Xinming Wei, Zhiyao Xie, Qiang Xu, Chenhao Xue, Evangeline F. Y. Young, Bei Yu, Mingxuan Yuan, Haoyi Zhang, Zuodong Zhang, Yuxiang Zhao, Hui-Ling Zhen, Ziyang Zheng, Binwu Zhu, Keren Zhu, Sunan Zou:
The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models. CoRR abs/2403.07257 (2024)
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last updated on 2024-12-02 22:28 CET by the dblp team
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