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Arvind Sudarsanam
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2010 – 2019
- 2010
- [j5]Arvind Sudarsanam, Robert Collier Barnes, J. Carver, Ramachandra Kallam, Aravind Dasu:
Dynamically reconfigurable systolic array accelerators: A case study with extended Kalman filter and discrete wavelet transform algorithms. IET Comput. Digit. Tech. 4(2): 126-142 (2010) - [c7]Shant Chandrakar, Abraham Clements, Arvind Sudarsanam, Aravind Dasu:
Memory architecture template for Fast Block Matching algorithms on FPGAs. IPDPS Workshops 2010: 1-8
2000 – 2009
- 2009
- [j4]Arvind Sudarsanam, Ramachandra Kallam, Aravind Dasu:
PRR-PRR Dynamic Relocation. IEEE Comput. Archit. Lett. 8(2): 44-47 (2009) - [j3]Jonathan Phillips, Arvind Sudarsanam, Harikrishna Samala, Ramachandra Kallam, J. Carver, Aravind Dasu:
Methodology to derive context adaptable architectures for FPGAs. IET Comput. Digit. Tech. 3(1): 124-141 (2009) - [j2]Arvind Sudarsanam, Aravind Dasu, Karthik Vaithianathan:
Analysis and Design of a Context Adaptable SAD/MSE Architecture. Int. J. Reconfigurable Comput. 2009: 789592:1-789592:21 (2009) - 2007
- [j1]Thomas Hauser, Aravind Dasu, Arvind Sudarsanam, Seth Young:
Performance of a LU decomposition on a multi-FPGA system compared to a low power commodity microprocessor system. Scalable Comput. Pract. Exp. 8(4) (2007) - 2006
- [c6]Seth Young, Arvind Sudarsanam, Aravind Dasu, Thomas Hauser:
Memory support design for LU decomposition on the starbridge hyper-computer. FPT 2006: 157-164 - 2005
- [c5]Arvind Sudarsanam, Aravind Dasu:
A Fast and Efficient FPGA-Based Implementation for Solving a System of Linear Interval Equations. FPT 2005: 291-292 - [c4]Aravind Dasu, Arvind Sudarsanam:
High Level - Application Analysis Techniques & Architectures - To Explore Design possibilities for Reduced Reconfiguration Area Overheads in FPGAs executing Compute Intensive Applications. IPDPS 2005 - 2004
- [c3]Arvind Sudarsanam, Aravind Dasu, Sethuraman Panchanathan:
Task Scheduling of Control-Data Flow Graphs for Reconfigurable Architectures. ERSA 2004: 225-231 - [c2]Arvind Sudarsanam, Mayur Srinivasan, Sethuraman Panchanathan:
Resource Estimation and Task Scheduling for Multithreaded Reconfigurable Architectures. ICPADS 2004: 323- - 2002
- [c1]Ali Akoglu, Aravind Dasu, Arvind Sudarsanam, Mayur Srinivasan, Sethuraman Panchanathan:
Pattern Recognition Tool to Detect Reconfigurable Patterns in MPEG4 Video Processing. IPDPS 2002
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