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Cheng-Hsiang Chiu
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2020 – today
- 2024
- [c10]Chedi Morchdi, Cheng-Hsiang Chiu, Yi Zhou, Tsung-Wei Huang:
A Resource-efficient Task Scheduling System using Reinforcement Learning : Invited Paper. ASPDAC 2024: 89-95 - [c9]Boyang Zhang
, Dian-Lun Lin
G-PASTA: GPU-Accelerated Partitioning Algorithm for Static Timing Analysis. DAC 2024: 76:1-76:6 - [c8]Cheng-Hsiang Chiu
An Efficient Task-Parallel Pipeline Programming Framework. HPC Asia 2024: 95-106 - [c7]Tsung-Wei Huang
Parallel and Heterogeneous Timing Analysis: Partition, Algorithm, and System. ISPD 2024: 51-59 - [c6]Cheng-Hsiang Chiu, Tsung-Wei Huang:
An Experimental Study of Dynamic Task Graph Parallelism for Large-Scale Circuit Analysis Workloads. ISVLSI 2024: 766-770 - [c5]Che Chang, Cheng-Hsiang Chiu, Boyang Zhang, Tsung-Wei Huang:
Incremental Critical Path Generation for Dynamic Graphs. ISVLSI 2024: 771-774 - 2023
- [c4]Cheng-Hsiang Chiu, Dian-Lun Lin, Tsung-Wei Huang:
Invited Paper: Programming Dynamic Task Parallelism for Heterogeneous EDA Algorithms. ICCAD 2023: 1-8 - 2022
- [c3]Cheng-Hsiang Chiu, Tsung-Wei Huang:
Efficient timing propagation with simultaneous structural and pipeline parallelisms: late breaking results. DAC 2022: 1388-1389 - [c2]Cheng-Hsiang Chiu, Tsung-Wei Huang:
Composing Pipeline Parallelism using Control Taskflow Graph. HPDC 2022: 283-284 - [i1]Cheng-Hsiang Chiu, Tsung-Wei Huang, Zizheng Guo, Yibo Lin:
Pipeflow: An Efficient Task-Parallel Pipeline Programming Framework using Modern C++. CoRR abs/2202.00717 (2022) - 2021
- [c1]Cheng-Hsiang Chiu, Dian-Lun Lin
An Experimental Study of SYCL Task Graph Parallelism for Large-Scale Machine Learning Workloads. Euro-Par Workshops 2021: 468-479
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