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Ritvik Sharma
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2020 – today
- 2024
- [j3]Ritvik Sharma
, Sara Achour
Compilation of Qubit Circuits to Optimized Qutrit Circuits. Proc. ACM Program. Lang. 8(PLDI): 272-295 (2024) - [c6]Kalhan Koul, Maxwell Strange, Jackson Melchert, Alex Carsello, Yuchen Mei, Olivia Hsu, Taeyoung Kong, Po-Han Chen, Huifeng Ke, Keyi Zhang, Qiaoyi Liu, Gedeon Nyengele, Akhilesh Balasingam, Jayashree Adivarahan, Ritvik Sharma, Zhouhua Xie, Christopher Torng, Joel S. Emer, Fredrik Kjolstad, Mark Horowitz, Priyanka Raina:
Onyx: A Programmable Accelerator for Sparse Tensor Algebra. HCS 2024: 1-91 - [c5]Kalhan Koul, Maxwell Strange, Jackson Melchert, Alex Carsello, Yuchen Mei, Olivia Hsu, Taeyoung Kong, Po-Han Chen, Huifeng Ke, Keyi Zhang, Qiaoyi Liu, Gedeon Nyengele, Akhilesh Balasingam, Jayashree Adivarahan, Ritvik Sharma, Zhouhua Xie, Christopher Torng, Joel S. Emer, Fredrik Kjolstad, Mark Horowitz, Priyanka Raina:
Onyx: A 12nm 756 GOPS/W Coarse-Grained Reconfigurable Array for Accelerating Dense and Sparse Applications. VLSI Technology and Circuits 2024: 1-2 - 2023
- [j2]Shikhar Tuli
CODEBench: A Neural Architecture and Hardware Accelerator Co-Design Framework. ACM Trans. Embed. Comput. Syst. 22(3): 51:1-51:30 (2023) - [c4]Jackson Melchert, Kathleen Feng, Caleb Donovick, Ross Daly, Ritvik Sharma, Clark W. Barrett, Mark A. Horowitz, Pat Hanrahan, Priyanka Raina:
APEX: A Framework for Automated Processing Element Design Space Exploration using Frequent Subgraph Analysis. ASPLOS (3) 2023: 33-45 - [c3]Olivia Hsu, Maxwell Strange, Ritvik Sharma, Jaeyeon Won, Kunle Olukotun, Joel S. Emer, Mark A. Horowitz, Fredrik Kjølstad
The Sparse Abstract Machine. ASPLOS (3) 2023: 710-726 - 2022
- [j1]Siddharth Dangwal, Ritvik Sharma, Debanjan Bhowmik
Fast-QTrain: an algorithm for fast training of variational classifiers. Quantum Inf. Process. 21(5): 189 (2022) - [i2]Olivia Hsu, Maxwell Strange, Jaeyeon Won, Ritvik Sharma, Kunle Olukotun, Joel S. Emer, Mark Horowitz, Fredrik Kjolstad:
The Sparse Abstract Machine. CoRR abs/2208.14610 (2022) - [i1]Shikhar Tuli, Chia-Hao Li, Ritvik Sharma, Niraj K. Jha:
CODEBench: A Neural Architecture and Hardware Accelerator Co-Design Framework. CoRR abs/2212.03965 (2022) - 2021
- [c2]Janak Sharda
A Crossbar Array of Analog-Digital-Hybrid Volatile Memory Synapse Cells for Energy-Efficient On-Chip Learning. ISCAS 2021: 1-5 - 2020
- [c1]Rajkumar Kubendran, Jongkil Park, Ritvik Sharma, Chul Kim, Siddharth Joshi, Gert Cauwenberghs, Sohmyung Ha:
A 4.2-pJ/Conv 10-b Asynchronous ADC with Hybrid Two-Tier Level-Crossing Event Coding. ISCAS 2020: 1-5
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