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Vojin Zivojnovic
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2010 – 2019
- 2017
- [c13]Mirela Simonovic, Vojin Zivojnovic, Lazar Saranovac
:
Formal model for system-level power management design. DATE 2017: 1599-1602
1990 – 1999
- 1999
- [c12]Stefan Pees, Andreas Hoffmann, Vojin Zivojnovic, Heinrich Meyr:
LISA - Machine Description Language for Cycle-Accurate Models of Programmable DSP Architectures. DAC 1999: 933-938 - [c11]Lisa M. Guerra, Joachim Fitzner, Dipankar Talukdar, Chris Schläger, Bassam Tabbara, Vojin Zivojnovic:
Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification. DAC 1999: 964-969 - 1998
- [b1]Vojin Zivojnovic:
Der quantitative Ansatz zum gleichzeitigen Entwurf der DSP Architektur und des Compilers. RWTH Aachen University, Germany, Shaker 1998, ISBN 978-3-8265-3919-0, pp. 1-122 - [j3]Vojin Zivojnovic:
Minimum Fisher information of moment-constrained distributions with application to robust blind identification. Signal Process. 65(2): 297-313 (1998) - 1997
- [j2]Vojin Zivojnovic, Steven W. K. Tjiang, Heinrich Meyr:
Compiled Simulation of Programmable DSP Architectures. J. VLSI Signal Process. 16(1): 73-80 (1997) - [c10]Stefan Pees, Martin Vaupel, Vojin Zivojnovic, Heinrich Meyr:
On core and more: a design perspective for systems-on-a-chip. ASAP 1997: 448-457 - [c9]Rainer Schoenen, Vojin Zivojnovic, Heinrich Meyr:
An upper bound of the throughput of multirate multiprocessor schedules. ICASSP 1997: 655-658 - [c8]Markus Willems, Holger Keding, Vojin Zivojnovic, Heinrich Meyr:
Modulo-addressing utilization in automatic software synthesis for digital signal processors. ICASSP 1997: 687-690 - [c7]Vojin Zivojnovic, Dominikus Noll:
Minimum Fisher information spectral analysis. ICASSP 1997: 3957-3960 - 1996
- [c6]Vojin Zivojnovic, Heinrich Meyr:
Compiled HW/SW Co-Simulation. DAC 1996: 690-695 - [c5]Vojin Zivojnovic, Rainer Schoenen:
On retiming of multirate DSP algorithms. ICASSP 1996: 3310-3313 - [c4]Markus Willems, Vojin Zivojnovic, Sebastian Ritz:
Hierarchization of a priori defined dataflow subgraphs. ICASSP 1996: 3322-3325 - [c3]Vojin Zivojnovic, Stefan Pees, C. Schälger, Markus Willems, Rainer Schoenen, Heinrich Meyr:
DSP Processor/Compiler Co-Design: A Quantitative Approach. ISSS 1996: 108- - 1994
- [c2]Vojin Zivojnovic, Sebastian Ritz, Heinrich Meyr:
Retiming of DSP programs for optimum vectorization. ICASSP (2) 1994: 465-468 - 1993
- [j1]Sebastian Ritz, Matthias Pankert, Vojin Zivojnovic, Heinrich Meyr:
High-Level Software Synthesis for the Design of Communication Systems. IEEE J. Sel. Areas Commun. 11(3): 348-358 (1993) - [c1]Vojin Zivojnovic, Heinrich Meyr:
Design of optimum interpolation filters for digital demodulators. ISCAS 1993: 140-143
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