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Renaud Gillon
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2020 – today
- 2024
- [j6]Sadia Azam
, Nicola Dall'Ora
Analog Defect Injection and Fault Simulation Techniques: A Systematic Literature Review. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(1): 16-29 (2024) - [c19]Nicola Dall'Ora
Analog Fault Simulation: Trends and Perspectives in Analog Hardware Description Languages. LATS 2024: 1-2 - 2023
- [c18]Nicola Dall'Ora
Verilog-A Implementation of Generic Defect Templates for Analog Fault Injection. ACM Great Lakes Symposium on VLSI 2023: 477-481 - 2022
- [c17]Sadia Azam, Nicola Dall'Ora
Investigation on Realistic Stuck-on/off Defects to Complement IEEE P2427 Draft Standard. ISQED 2022: 51-57
2010 – 2019
- 2019
- [c16]Vedran Major, Josip Bacmaga, Renaud Gillon
Design and Characterization of Bias Tee Used for S-parameter Characterization of Power Inductors. MIPRO 2019: 82-86 - 2017
- [i2]David Duque, Tomás Gotthans, Renaud Gillon, Sebastian Schöps:
An Extended Analytic Model for the Heating of Bondwires. CoRR abs/1709.10069 (2017) - 2016
- [c15]Nicodemus Banagaaya, Lihong Feng, Wim Schoenmaker, Peter Meuris, Aarnout Wieers, Renaud Gillon, Peter Benner:
Model Order Reduction for nanoelectronics coupled problems with many inputs. DATE 2016: 313-318 - [c14]Thorben Casper, Herbert De Gersem, Renaud Gillon, Tomás Gotthans, Tomas Kratochvil, Peter Meuris, Sebastian Schöps:
Electrothermal simulation of bonding wire degradation under uncertain geometries. DATE 2016: 1297-1302 - [i1]Thorben Casper, Herbert De Gersem, Renaud Gillon, Tomás Gotthans, Tomas Kratochvil, Peter Meuris, Sebastian Schöps:
Electrothermal Simulation of Bonding Wire Degradation under Uncertain Geometries. CoRR abs/1610.04303 (2016) - 2015
- [j5]Nicola Bombieri
Addressing the Smart Systems design challenge: The SMAC platform. Microprocess. Microsystems 39(8): 1158-1173 (2015) - [c13]Tvrtko Mandic, Raul Blecic, Renaud Gillon
DC/DC converter dead-time variation analysis and far-field radiation estimation. EMC Compo 2015: 7-12 - [c12]Raul Blecic, Renaud Gillon
Radiation characteristics of small loop antenna above perforated finite image plane. EMC Compo 2015: 222-227 - [c11]Josip Bacmaga, Raul Blecic, Renaud Gillon
3D EM simulations and analysis of in-package metal plate interconnecting high-side and low-side FETs of DC-DC converter. ICECS 2015: 364-367 - [c10]Raul Blecic, Renaud Gillon
SPICE analysis of RL and RC snubber circuits for synchronous buck DC-DC converters. MIPRO 2015: 91-97 - 2014
- [c9]Dimitri de Jonghe, Georges G. E. Gielen, Renaud Gillon
Automatic generation of electro-thermal models with TRAPPIST. ICECS 2014: 842-845 - [c8]Renaud Gillon
Multi-domain simulation as a foundation for the engineering of smart systems: Challenges and the SMAC vision. ICECS 2014: 858-861 - 2013
- [c7]Nicola Bombieri
SMAC: Smart Systems Co-design. DSD 2013: 253-259 - [c6]Renaud Gillon
Broadband detection of radiating moments using the TEM-cell and a phase-calibrated oscilloscope. EMC Compo 2013: 27-32 - [c5]Tvrtko Mandic, Renaud Gillon
IC-Stripline design optimization using response surface methodology. EMC Compo 2013: 69-73 - 2012
- [j4]J. Rhayem, B. Besbes, Raul Blecic, Sergey Bychikhin, Georg Haberfehlner
Electro-thermal characterization and simulation of integrated multi-trenched XtreMOSTM power devices. Microelectron. J. 43(9): 618-623 (2012) - [j3]Andrej Ivankovic, Kris Vanstreels, Daniel Vanderstraeten, Guy Brizar, Renaud Gillon
Comparison of experimental methods for the extraction of the elastic modulus of molding compounds used in IC packaging. Microelectron. Reliab. 52(11): 2677-2684 (2012) - 2010
- [j2]Sergey Bychikhin, Georg Haberfehlner
Investigation of smart power DMOS devices under repetitive stress conditions using transient thermal mapping and numerical simulation. Microelectron. Reliab. 50(9-11): 1427-1430 (2010)
2000 – 2009
- 2009
- [c4]Tvrtko Mandic, Filip Vanhee, Renaud Gillon
Equivalent circuit model of the TEM cell electric and magnetic field coupling to microstrip lines. ICECS 2009: 247-250 - 2008
- [c3]Marnix Tack, Peter Moens, Renaud Gillon
Next Generation Smart Power Technologies - Challenges and Innovations Enabling Complex SoC Integration. ISSCC 2008: 296-297 - 2007
- [c2]Yogesh Singh Chauhan
A New Charge based Compact Model for Lateral Asymmetric MOSFET and its application to High Voltage MOSFET Modeling. VLSI Design 2007: 177-182 - 2006
- [c1]Yogesh Singh Chauhan
A Compact DC and AC Model for Circuit Simulation of High Voltage VDMOS Transistor. ISQED 2006: 109-114 - 2001
- [j1]Zhenqiu Ning, Yuri Sneyders, Wim Vanderbauwhede, Renaud Gillon
A compact test structure for characterisation of leakage currents in sub-micron CMOS technologies. Microelectron. Reliab. 41(12): 1939-1945 (2001)
Coauthor Index
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