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Takuya Teraoka

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2010 – 2019

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2016
[c2]
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Motoki Amagasaki, Yuji Nakamura, Takuya Teraoka, Masahiro Iida, Toshinori Sueyoshi:
An area compact soft error resident circuit for FPGA. ICICDT 2016: 1-4
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Motoki Amagasaki, Yuji Nakamura, Takuya Teraoka, Masahiro Iida, Toshinori Sueyoshi:
A novel soft error tolerant FPGA architecture. VLSI-SoC 2016: 1-6

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