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Dileepan Joseph
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- affiliation: University of Alberta, Edmonton, Canada
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2020 – today
- 2023
- [j14]Syed Hussain, Maikon Nascimento, Dileepan Joseph:
Nonlinear demosaicking method and apparatus for nonlinear CMOS image sensors exhibiting low-density salt-and-pepper noise. J. Electronic Imaging 32(2) (2023) - [i2]Dileepan Joseph:
Ricci-Notation Tensor Framework for Model-Based Approaches to Imaging. CoRR abs/2312.04018 (2023) - 2022
- [c8]Kuldeep Singh, Fernando Saccon, Dileepan Joseph:
Incremental two-network approach to develop a purity analyzer system for canola seeds. IRIACV 2022: 1-7
2010 – 2019
- 2019
- [c7]Syed Hussain, Dileepan Joseph:
Spline-based colour correction for monotonic nonlinear CMOS image sensors. IMSE 2019: 1-7 - [c6]Maikon Nascimento, Dileepan Joseph:
System-on-Chip design flow for the image signal processor of a nonlinear CMOS imaging system. IMSE 2019: 1-7 - [c5]Maikon Nascimento, Jing Li, Dileepan Joseph:
Digital circuit methods to correct and filter noise of nonlinear CMOS image sensors (JIST-first). IMSE 2019: 1-14 - 2018
- [j13]Adam P. Harrison, Dileepan Joseph:
High Performance Rearrangement and Multiplication Routines for Sparse Tensor Arithmetic. SIAM J. Sci. Comput. 40(2) (2018) - [i1]Adam P. Harrison, Dileepan Joseph:
High Performance Rearrangement and Multiplication Routines for Sparse Tensor Arithmetic. CoRR abs/1802.02619 (2018) - 2016
- [j12]Adam P. Harrison, Dileepan Joseph:
Numeric tensor framework: Exploiting and extending Einstein notation. J. Comput. Sci. 16: 128-139 (2016) - [c4]Jing Li, Orit Skorka, Kamal Ranaweera, Dileepan Joseph:
Novel Real-Time Tone-Mapping Operator for Noisy Logarithmic CMOS Image Sensors. IMSE 2016: 1-13 - 2015
- [j11]Jing Li, Alireza Mahmoodi, Dileepan Joseph:
Using Polynomials to Simplify Fixed Pattern Noise and Photometric Correction of Logarithmic CMOS Image Sensors. Sensors 15(10): 26331-26352 (2015) - [c3]Adam P. Harrison, Dileepan Joseph:
Depth-map and albedo estimation with superior information-theoretic performance. Image Processing: Machine Vision Applications 2015: 94050C - [c2]Cindy M. Wong, Dileepan Joseph:
Dynamic hierarchical algorithm for accelerated microfossil identification. Image Processing: Machine Vision Applications 2015: 940503 - 2013
- [j10]Alireza Mahmoodi, Jing Li, Dileepan Joseph:
Digital Pixel Sensor Array with Logarithmic Delta-Sigma Architecture. Sensors 13(8): 10765-10782 (2013) - 2012
- [j9]Adam P. Harrison, Dileepan Joseph:
Translational photometric alignment of single-view image sequences. Comput. Vis. Image Underst. 116(6): 765-776 (2012) - [j8]Adam P. Harrison, Dileepan Joseph:
Maximum Likelihood Estimation of Depth Maps Using Photometric Stereo. IEEE Trans. Pattern Anal. Mach. Intell. 34(7): 1368-1380 (2012) - 2011
- [j7]Orit Skorka, Dileepan Joseph:
Toward a digital camera to rival the human eye. J. Electronic Imaging 20(3): 033009 (2011) - [j6]Orit Skorka, Dileepan Joseph:
Design and Fabrication of Vertically-Integrated CMOS Image Sensors. Sensors 11(5): 4512-4538 (2011)
2000 – 2009
- 2009
- [j5]Dileepan Joseph, Steve Collins:
Temperature Dependence of Fixed Pattern Noise in Logarithmic CMOS Image Sensors. IEEE Trans. Instrum. Meas. 58(8): 2503-2511 (2009) - 2007
- [j4]Stephen O. Otim, Bhaskar Choubey, Dileepan Joseph, Steve Collins:
Characterization and Simple Fixed Pattern Noise Correction in Wide Dynamic Range "Logarithmic" Imagers. IEEE Trans. Instrum. Meas. 56(5): 1910-1916 (2007) - 2004
- [c1]Bhaskar Choubey, Satoshi Aoyama, Dileepan Joseph, Stephen O. Otim, Steve Collins:
An electronic calibration scheme for logarithmic CMOS pixels. ISCAS (4) 2004: 856-859 - 2003
- [j3]Dileepan Joseph, Steve Collins:
Modeling, calibration, and rendition of color logarithmic CMOS image sensors. IEEE Trans. Instrum. Meas. 52(5): 1581-1587 (2003) - 2002
- [j2]Dileepan Joseph, Steve Collins:
Modeling, calibration, and correction of nonlinear illumination-dependent fixed pattern noise in logarithmic CMOS image sensors. IEEE Trans. Instrum. Meas. 51(5): 996-1001 (2002) - 2001
- [j1]Dileepan Joseph, Lionel Tarassenko, Steve Collins:
Analysis and simulation of a cascaded delta delta-sigma modulator. Comput. Stand. Interfaces 23(2): 103-110 (2001)
Coauthor Index
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