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Xuan-Thuan Nguyen
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2020 – today
- 2024
- [j15]Anh-Tu Nguyen, Thanh-Lam Bui, Huy Anh Bui, Sy-Tai Nguyen, Xuan-Thuan Nguyen:
Application of hedge algebras algorithm for mobile robot controller via hand gestures and wireless protocol. J. Intell. Fuzzy Syst. 46(1): 1201-1212 (2024) - [i8]Ngoc-Duy Tran, Hoang-Hiep Ly, Xuan-Thuan Nguyen, Thi-Thoa Mac, Anh Nguyen, Tung D. Ta:
Hybrid Gripper with Passive Pneumatic Soft Joints for Grasping Deformable Thin Objects. CoRR abs/2410.05789 (2024) - [i7]Nhat-Minh Dzoan, Thi-Thoa Mac, Hoang-Hiep Ly, Xuan-Thuan Nguyen:
Design and Implementation of Hedge Algebra Controller using Recursive Semantic Values for Cart-pole System. CoRR abs/2410.15058 (2024) - 2023
- [j14]Thanh-Lam Bui
, Thanh-Hung Nguyen
A Controller for Delta Parallel Robot Based on Hedge Algebras Method. J. Robotics 2023: 2271030:1-2271030:20 (2023) - 2022
- [i6]Anh-Tu Nguyen, Van-Truong Nguyen, Xuan-Thuan Nguyen, Cong-Thanh Vu:
Mobile Robot Motion Control Using a Combination of Fuzzy Logic Method and Kinematic Model. CoRR abs/2211.05575 (2022) - 2020
- [j13]Xuan-Thuan Nguyen
A 0.9-V 50-MHz 256-bit 1D-to-2D-based single/multi-match priority encoder with 0.67-nW standby power on 65-nm SOTB CMOS. Microprocess. Microsystems 73: 102970 (2020) - [c17]Van-Truong Nguyen
Nonlinearities Output-Feedback Adaptive Nonsingular Fast Terminal Sliding Mode Control for Redundant Parallel Manipulators. ICSSE 2020: 1-5
2010 – 2019
- 2019
- [j12]Xuan-Thuan Nguyen
A 1.2-V 162.9 pJ/cycle bitmap index creation core with 0.31-pW/bit standby power on 65-nm SOTB. Microprocess. Microsystems 69: 112-117 (2019) - [j11]Xuan-Thuan Nguyen
An Efficient I/O Architecture for RAM-Based Content-Addressable Memory on FPGA. IEEE Trans. Circuits Syst. II Express Briefs 66-II(2): 472-476 (2019) - [j10]Trong-Thuc Hoang
Low-Power Floating-Point Adaptive-CORDIC-Based FFT Twiddle Factor on 65-nm Silicon-on-Thin-BOX (SOTB) With Back-Gate Bias. IEEE Trans. Circuits Syst. II Express Briefs 66-II(10): 1723-1727 (2019) - [c16]Xuan-Thuan Nguyen, Trong-Thuc Hoang, Katsumi Inoue, Ngoc-Tu Bui, Van-Phuc Hoang
A 1.2-V 90-MHz Bitmap Index Creation Accelerator with 0.27-nW Standby Power on 65-nm Silicon-On-Thin-Box (SOTB) CMOS. ISCAS 2019: 1-4 - [c15]Reza Pazhouhandeh, Gerard O'Leary, Iliya Weisspapir, David M. Groppe, Xuan-Thuan Nguyen, Karim Abdelhalim, Hamed Mazhab-Jafari, Taufik A. Valiante, Peter L. Carlen, Naveen Verma, Roman Genov:
Adaptively Clock-Boosted Auto-Ranging Responsive Neurostimulator for Emerging Neuromodulation Applications. ISSCC 2019: 374-376 - 2018
- [j9]Xuan-Thuan Nguyen
An FPGA-Based Hardware Accelerator for Energy-Efficient Bitmap Index Creation. IEEE Access 6: 16046-16059 (2018) - [j8]Hong-Thu Nguyen, Xuan-Thuan Nguyen, Trong-Thuc Hoang
A CORDIC-based QR decomposition for MIMO signal detector. IEICE Electron. Express 15(5) (2018) - [j7]Hong-Thu Nguyen, Xuan-Thuan Nguyen, Cong-Kha Pham
A High-Throughput Low-Energy Arithmetic Processor. IEICE Trans. Electron. 101-C(4): 281-284 (2018) - [j6]Hong-Thu Nguyen
A Low-Power Hybrid Adaptive CORDIC. IEEE Trans. Circuits Syst. II Express Briefs 65-II(4): 496-500 (2018) - [c14]Hong-Thu Nguyen, Xuan-Thuan Nguyen, Cong-Kha Pham
An efficient fixed-point arithmetic processor using a hybrid CORDIC algorithm. ASP-DAC 2018: 327-328 - [c13]Xuan-Thuan Nguyen, Trong-Thuc Hoang
A 219-μW 1D-to-2D-Based Priority Encoder on 65-nm SOTB CMOS. ISCAS 2018: 1-4 - [c12]Katsumi Inoue, Trong-Thuc Hoang
VLSI Design of Frequent Items Counting Using Binary Decoders Applied to 8-bit per Item Case-study. PRIME 2018: 161-164 - [i5]Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham:
An FPGA-Based Hardware Accelerator for Energy-Efficient Bitmap Index Creation. CoRR abs/1803.11207 (2018) - [i4]Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham:
An Efficient I/O Architecture for RAM-based Content-Addressable Memory on FPGA. CoRR abs/1804.02330 (2018) - [i3]Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham:
A 1.2-V 162.9-pJ/cycle Bitmap Index Creation Core with 0.31-pW/bit Standby Power on 65-nm SOTB. CoRR abs/1806.06902 (2018) - 2017
- [j5]Hong-Thu Nguyen, Xuan-Thuan Nguyen, Cong-Kha Pham
A Low-Latency Parallel Pipeline CORDIC. IEICE Trans. Electron. 100-C(4): 391-398 (2017) - [j4]Xuan-Thuan Nguyen
A Scalable High-Performance Priority Encoder Using 1D-Array to 2D-Array Conversion. IEEE Trans. Circuits Syst. II Express Briefs 64-II(9): 1102-1106 (2017) - [c11]Xuan-Thuan Nguyen, Hong-Thu Nguyen, Katsumi Inoue, Osamu Shimojo, Cong-Kha Pham
Highly parallel bitmap-based regular expression matching for text analytics. ISCAS 2017: 1-4 - [c10]Yuichiro Mori, Xuan-Thuan Nguyen, Cong-Kha Pham
Reliable and energy-efficient transmission on the Internet-of-Video-Things. ISCIT 2017: 1-4 - [c9]Trong-Thuc Hoang
FPGA-based frequent items counting using matrix of equality comparators. MWSCAS 2017: 285-288 - [i2]Xuan-Thuan Nguyen, Trong-Tu Bui, Huu-Thuan Huynh, Duc-Hung Le, Cong-Kha Pham:
A Flexible High-Bandwidth Low-Latency Multi-Port Memory Controller. CoRR abs/1712.03477 (2017) - [i1]Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham:
A Scalable High-Performance Priority Encoder Using 1D-Array to 2D-Array Conversion. CoRR abs/1712.03478 (2017) - 2016
- [j3]Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham
An FPGA approach for fast bitmap indexing. IEICE Electron. Express 13(4): 20160006 (2016) - [j2]Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham
An FPGA approach for high-performance multi-match priority encoder. IEICE Electron. Express 13(13): 20160447 (2016) - [c8]Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham
A high-throughput and low-power design for bitmap indexing on 65-nm SOTB CMOS process. ICICDT 2016: 1-4 - [c7]Xuan-Thuan Nguyen, Hong-Thu Nguyen, Trong-Thuc Hoang
An efficient FPGA-based database processor for fast database analytics. ISCAS 2016: 1758-1761 - [c6]Trong-Thuc Hoang
A hybrid adaptive CORDIC in 65nm SOTB CMOS process. ISCAS 2016: 2158-2161 - 2015
- [j1]Hong-Thu Nguyen, Xuan-Thuan Nguyen, Trong-Thuc Hoang
Low-resource low-latency hybrid adaptive CORDIC with floating-point precision. IEICE Electron. Express 12(9): 20150258 (2015) - [c5]Xuan-Thuan Nguyen, Cong-Kha Pham
An efficient multi-port memory controller for multimedia applications. ASP-DAC 2015: 12-13 - [c4]Duc-Hung Le
Design of a low-power fixed-point 16-bit digital signal processor using 65nm SOTB process. ICICDT 2015: 1-4 - [c3]Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham
SAR: A Self-Adaptive and Reliable protocol for wireless multimedia sensor networks. ICUFN 2015: 760-765 - [c2]Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham
Parallel pipelining configurable multi-port memory controller for multimedia applications. ISCAS 2015: 2908-2911 - 2012
- [c1]Xuan-Thuan Nguyen, Lam-Hoai-Phong Nguyen, Trong-Tu Bui, Huu-Thuan Huynh
A real-time DSP-based hand gesture recognition system. ISSPIT 2012: 286-291
Coauthor Index
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