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Ricardo Povoa
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2020 – today
- 2022
- [j16]António Gusmão
, Ricardo Póvoa
DeepPlacer: A custom integrated OpAmp placement tool using deep models. Appl. Soft Comput. 115: 108188 (2022) - [c24]Fábio Passos, Rafael Vieira, António Canelas, Ricardo Póvoa, Nuno Lourenço, Nuno Horta
A Radiation-Hardened Frequency-Locked Loop On-Chip Oscillator with 33.6ppm/°C Stability for Space Applications. ISCAS 2022: 1-5 - [c23]Nuno Lourenço, Fábio Passos, Rafael Vieira, Ricardo Martins, Nuno Horta, Jorge Guilherme, Ricardo Póvoa:
Radiation-Hardened Bandgap Voltage and Current Reference for Space Applications with 2.38 ppm/°C Temperature Coefficient. SMACD 2022: 1-4 - [c22]Rafael Vieira, Fábio Passos, Ricardo Povoa, Ricardo Martins, Nuno Horta
Architectural Design for Heartbeat Detection Circuits using Verilog-A Behavioral Modeling. SMACD 2022: 1-4 - 2021
- [j15]Ricardo Martins
Shortening the gap between pre- and post-layout analog IC performance by reducing the LDE-induced variations with multi-objective simulated quantum annealing. Eng. Appl. Artif. Intell. 98: 104102 (2021) - 2020
- [j14]Ricardo Póvoa
A new family of CMOS inverter-based OTAs for biomedical and healthcare applications. Integr. 71: 38-48 (2020) - [j13]Ricardo Póvoa
Sub-μW Tow-Thomas based biquad filter with improved gain for biomedical applications. Microelectron. J. 95 (2020) - [j12]António Canelas
FUZYE: A Fuzzy c-Means Analog IC Yield Optimization Using Evolutionary-Based Algorithms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(1): 1-13 (2020) - [j11]Ricardo Póvoa
A Folded Voltage-Combiners Biased Amplifier for Low Voltage and High Energy-Efficiency Applications. IEEE Trans. Circuits Syst. II Express Briefs 67-II(2): 230-234 (2020) - [c21]António Gusmão
Semi-Supervised Artificial Neural Networks towards Analog IC Placement Recommender. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [j10]Ricardo Martins
Two-Step RF IC Block Synthesis With Preoptimized Inductors and Full Layout Generation In-the-Loop. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(6): 989-1002 (2019) - [c20]Daniel Guerra, António Canelas, Ricardo Póvoa
Artificial Neural Networks as an Alternative for Automatic Analog IC Placement. SMACD 2019: 1-4 - [c19]Nuno Lourenço
Using Polynomial Regression and Artificial Neural Networks for Reusable Analog IC Sizing. SMACD 2019: 13-16 - [c18]Ricardo Martins
On the Exploration of Design Tradeoffs in Analog IC Placement with Layout-dependent Effects. SMACD 2019: 25-28 - [c17]Ricardo Póvoa
A Low Noise CMOS Inverter-Based OTA for and Healthcare Signal Receivers. SMACD 2019: 161-164 - [c16]Nuno Lourenço
Hard and Soft Constraints for Multi-objective Analog IC Sizing Optimization. SMACD 2019: 285-288 - 2018
- [j9]Jonathan Calvillo, Ricardo Póvoa
Second-order compensation BGR with low TC and high performance for space applications. Integr. 63: 256-265 (2018) - [j8]Fábio Passos
Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology. Integr. 63: 351-361 (2018) - [j7]Ricardo Povoa
Single-Stage Amplifier Biased by Voltage Combiners With Gain and Energy-Efficiency Enhancement. IEEE Trans. Circuits Syst. II Express Briefs 65-II(3): 266-270 (2018) - [j6]Ricardo Povoa
Single-Stage OTA Biased by Voltage-Combiners With Enhanced Performance Using Current Starving. IEEE Trans. Circuits Syst. II Express Briefs 65-II(11): 1599-1603 (2018) - [c15]Tiago Pessoa, Nuno Lourenço
Enhanced analog and RF IC sizing methodology using PCA and NSGA-II optimization kernel. DATE 2018: 660-665 - [c14]Jigme Zangpo
An Integrated LC Oscillator with Self Compensation for Frequency Drift and PVT Corners Variations. ICECS 2018: 333-336 - [c13]António Canelas, Ricardo Povoa
A 20 DB Gain Two-Stage Low-Noise Amplifier with High Yield for 5 GHz Applications. SMACD 2018: 1-4 - [c12]Fábio Passos
Handling the Effects of Variability and Layout Parasitics in the Automatic Synthesis of LNAs. SMACD 2018: 1-164 - [c11]Nuno Lourenço
On the Exploration of Promising Analog IC Designs via Artificial Neural Networks. SMACD 2018: 133-136 - 2017
- [c10]António Canelas
Efficient yield optimization method using a variable K-Means algorithm for analog IC sizing. DATE 2017: 1201-1206 - [c9]Nuno C. Lourenço
New mapping strategies for pre-optimized inductor sets in bottom-up RF IC sizing optimization. SMACD 2017: 1-4 - [c8]Ricardo Martins
Layout-aware challenges and a solution for the automatic synthesis of radio-frequency IC blocks. SMACD 2017: 1-4 - [c7]Fábio Passos
Systematic design of a voltage controlled oscillator using a layout-aware approach. SMACD 2017: 1-4 - 2016
- [j5]Ricardo Povoa
Automatic synthesis of RF front-end blocks using multi-objective evolutionary techniques. Integr. 52: 243-252 (2016) - [j4]Ricardo Martins
Current-flow and current-density-aware multi-objective optimization of analog IC placement. Integr. 55: 295-306 (2016) - [j3]Nuno Lourenço
AIDA: Layout-aware analog circuit-level sizing with in-loop layout generation. Integr. 55: 316-329 (2016) - [j2]Mrinalinee Pandey
Design and application of a CMOS active inductor at Ku band based on a multi-objective optimizer. Integr. 55: 330-340 (2016) - [c6]António Canelas
Yield optimization using k-means clustering algorithm to reduce Monte Carlo simulations. SMACD 2016: 1-4 - 2015
- [j1]Nuno Lourenço
Floorplan-aware analog IC sizing and optimization based on topological constraints. Integr. 48: 183-197 (2015) - [c5]Ricardo Povoa
A voltage-combiners-biased amplifier with enhanced gain and speed using current starving. ISCAS 2015: 2069-2072 - 2014
- [c4]Ricardo Povoa
A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner. ICECS 2014: 263-266 - [c3]Ricardo Povoa
LC-VCO automatic synthesis using multi-objective evolutionary techniques. ISCAS 2014: 293-296 - 2013
- [c2]Frederico Rocha, Nuno Lourenço
A new metaheuristc combining gradient models with NSGA-II to enhance analog IC synthesis. IEEE Congress on Evolutionary Computation 2013: 2781-2788 - [c1]Ricardo Povoa
Single-stage amplifiers with gain enhancement and improved energy-efficiency employing voltage-combiners. VLSI-SoC 2013: 19-22
Coauthor Index
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