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Vincent Immler
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2020 – today
- 2024
- [j7]Jonah Bosland, Stefan Ene, Peter Baumgartner, Vincent Immler:
High-Performance Design Patterns and File Formats for Side-Channel Analysis. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2024(2): 769-794 (2024) - 2023
- [c13]Stanislav Lyakhov, Vincent Immler:
Analysis of Arbitrary Waveform Generation for Voltage Glitches. FDTC 2023: 36-47 - 2020
- [c12]Michael Pehl, Tobias Tretschok, Daniel Becker, Vincent Immler
:
Spatial Context Tree Weighting for Physical Unclonable Functions. ECCTD 2020: 1-4
2010 – 2019
- 2019
- [b1]Vincent Immler:
Higher-Order Alphabet Physical Unclonable Functions: Constructions, Properties, and Applications. Technical University of Munich, Germany, 2019 - [j6]Vincent Immler
Variable-Length Bit Mapping and Error-Correcting Codes for Higher-Order Alphabet PUFs - Extended Version. J. Hardw. Syst. Secur. 3(1): 78-93 (2019) - [j5]Vincent Immler, Johannes Obermaier
Secure Physical Enclosures from Covers with Tamper-Resistance. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2019(1): 51-96 (2019) - [j4]Vincent Immler, Karthik Uppund:
New Insights to Key Derivation for Tamper-Evident Physical Unclonable Functions. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2019(3): 30-65 (2019) - [c11]Lars Tebelmann, Michael Pehl, Vincent Immler
Side-Channel Analysis of the TERO PUF. COSADE 2019: 43-60 - [i4]Lars Tebelmann, Michael Pehl, Vincent Immler:
Side-Channel Analysis of the TERO PUF. IACR Cryptol. ePrint Arch. 2019: 312 (2019) - 2018
- [j3]Vincent Immler
Your rails cannot hide from localized EM: how dual-rail logic fails on FPGAs - extended version. J. Cryptogr. Eng. 8(2): 125-139 (2018) - [j2]Johannes Obermaier
The Past, Present, and Future of Physical Security Enclosures: From Battery-Backed Monitoring to PUF-Based Inherent Security and Beyond. J. Hardw. Syst. Secur. 2(4): 289-296 (2018) - [c10]Johannes Obermaier
A measurement system for capacitive PUF-based security enclosures. DAC 2018: 64:1-64:6 - [c9]Robert Specht, Vincent Immler
Dividing the threshold: Multi-probe localized EM analysis on threshold implementations. HOST 2018: 33-40 - [c8]Vincent Immler
B-TREPID: Batteryless tamper-resistant envelope with a PUF and integrity detection. HOST 2018: 49-56 - [c7]Elischa Ferres, Vincent Immler
Capacitive Multi-Channel Security Sensor IC for Tamper-Resistant Enclosures. IEEE SENSORS 2018: 1-4 - 2017
- [j1]Martha Johanna Sepúlveda, Daniel Flórez, Vincent Immler
Efficient security zones implementation through hierarchical group key management at NoC-based MPSoCs. Microprocess. Microsystems 50: 164-174 (2017) - [c6]Vincent Immler
Your Rails Cannot Hide from Localized EM: How Dual-Rail Logic Fails on FPGAs. CHES 2017: 403-424 - [c5]Vincent Immler
Take a moment and have some t: Hypothesis testing on raw PUF data. HOST 2017: 128-129 - [c4]Vincent Immler
Variable-Length Bit Mapping and Error-Correcting Codes for Higher-Order Alphabet PUFs. SPACE 2017: 190-209 - [i3]Vincent Immler, Robert Specht, Florian Unterstein:
Your Rails Cannot Hide From Localized EM: How Dual-Rail Logic Fails on FPGAs. IACR Cryptol. ePrint Arch. 2017: 608 (2017) - [i2]Vincent Immler, Matthias Hiller, Qinzhi Liu, Andreas Lenz, Antonia Wachter-Zeh:
Variable-Length Bit Mapping and Error-Correcting Codes for Higher-Order Alphabet PUFs. IACR Cryptol. ePrint Arch. 2017: 911 (2017) - 2016
- [c3]Vincent Immler
Practical Aspects of Quantization and Tamper-Sensitivity for Physically Obfuscated Keys. CS2@HiPEAC 2016: 13-18 - 2014
- [c2]Amir Moradi
Early Propagation and Imbalanced Routing, How to Diminish in FPGAs. CHES 2014: 598-615 - [i1]Amir Moradi, Vincent Immler:
Early Propagation and Imbalanced Routing, How to Diminish in FPGAs. IACR Cryptol. ePrint Arch. 2014: 454 (2014) - 2012
- [c1]Vincent Immler
Breaking Hitag 2 Revisited. SPACE 2012: 126-143
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last updated on 2024-06-10 21:28 CEST by the dblp team
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