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Hans-Jörg Peter
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- affiliation: Saarland University, Saarbrücken, Germany
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2010 – 2019
- 2016
- [c13]Guillaume Plassan, Hans-Jörg Peter, Katell Morin-Allory, Fahim Rahim, Shaker Sarwary, Dominique Borrione:
Conclusively verifying clock-domain crossings in very large hardware designs. VLSI-SoC 2016: 1-6 - [c12]Guillaume Plassan, Hans-Jörg Peter, Katell Morin-Allory, Shaker Sarwary, Dominique Borrione:
Improving the Efficiency of Formal Verification: The Case of Clock-Domain Crossings. VLSI-SoC (Selected Papers) 2016: 108-129 - 2013
- [b1]Hans-Jörg Peter:
A uniform approach to the complexity and analysis of succinct systems. Saarland University, 2013 - [j2]Werner Damm, Hans-Jörg Peter, Jan-Hendrik Rakow, Bernd Westphal:
Can we build it: formal synthesis of control strategies for cooperative driver assistance systems. Math. Struct. Comput. Sci. 23(4): 676-725 (2013) - 2012
- [c11]Hans-Jörg Peter, Bernd Finkbeiner:
The Complexity of Bounded Synthesis for Timed Control with Partial Observability. FORMATS 2012: 204-219 - [c10]Michael Gerke, Rüdiger Ehlers, Bernd Finkbeiner, Hans-Jörg Peter:
FlexRay for Avionics: Automatic Verification with Parametric Physical Layers. Infotech@Aerospace 2012 - [c9]Bernd Finkbeiner, Hans-Jörg Peter:
Template-Based Controller Synthesis for Timed Systems. TACAS 2012: 392-406 - 2011
- [c8]Hans-Jörg Peter, Rüdiger Ehlers
, Robert Mattmüller:
Synthia: Verification and Synthesis for Timed Automata. CAV 2011: 649-655 - 2010
- [j1]Bernd Finkbeiner, Hans-Jörg Peter, Sven Schewe
Synthesising certificates in networks of timed automata. IET Softw. 4(3): 222-235 (2010) - [c7]Michael Gerke, Rüdiger Ehlers
Model Checking the FlexRay Physical Layer Protocol. FMICS 2010: 132-147 - [c6]Rüdiger Ehlers
Combining Symbolic Representations for Solving Timed Games. FORMATS 2010: 107-121 - [c5]Rüdiger Ehlers
Making the Right Cut in Model Checking Data-Intensive Timed Systems. ICFEM 2010: 565-580 - [c4]Rüdiger Ehlers
Fully Symbolic Timed Model Checking Using Constraint Matrix Diagrams. RTSS 2010: 360-371
2000 – 2009
- 2009
- [c3]Hans-Jörg Peter, Robert Mattmüller:
Component-Based Abstraction Refinement for Timed Controller Synthesis. RTSS 2009: 364-374 - 2008
- [c2]Bernd Finkbeiner, Hans-Jörg Peter, Sven Schewe
Synthesizing Certificates in Networks of Timed Automata. RTSS 2008: 183-194 - [c1]Bernd Finkbeiner, Hans-Jörg Peter, Sven Schewe
RESY: Requirement Synthesis for Compositional Model Checking. TACAS 2008: 463-466
Coauthor Index
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