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Tun Li
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2020 – today
- 2025
- [j21]Yongtao Luo, Jie Liu, Chunye Gong, Tun Li:
An efficient heterogeneous parallel password recovery system on MT-3000. J. Supercomput. 81(1): 38 (2025) - 2024
- [j20]Tun Li
, Peng Shou, Xin Wan, Qian Li, Rong Wang, Chaolong Jia, Yunpeng Xiao:
A fast malware detection model based on heterogeneous graph similarity search. Comput. Networks 254: 110799 (2024) - [j19]Tun Li
A malware detection model based on imbalanced heterogeneous graph embeddings. Expert Syst. Appl. 246: 123109 (2024) - [j18]Yunpeng Xiao
A prediction model for rumor user propagation behavior based on sparse representation and transfer learning. Inf. Sci. 670: 120590 (2024) - [j17]Deheng Yang
Strider: Signal Value Transition-Guided Defect Repair for HDL Programming Assignments. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(5): 1594-1607 (2024) - [j16]Tun Li
A Malicious Information Traceability Model Based on Neighborhood Similarity and Multiple Types of Interaction. IEEE Trans. Comput. Soc. Syst. 11(5): 5815-5827 (2024) - [j15]WeiKang He
Interest HD: An Interest Frame Model for Recommendation Based on HD Image Generation. IEEE Trans. Neural Networks Learn. Syst. 35(10): 14356-14369 (2024) - 2023
- [j14]Tun Li, Yanbing Liu, Qilie Liu, Wei Xu, Yunpeng Xiao, Hong Liu
A malware propagation prediction model based on representation learning and graph convolutional networks. Digit. Commun. Networks 9(5): 1090-1100 (2023) - [j13]Yunpeng Xiao
A Diffusion Model for Multimessage Multidimensional Complex Game Based on Rumor and Anti-Rumor. IEEE Trans. Comput. Soc. Syst. 10(5): 2672-2685 (2023) - [j12]Yunpeng Xiao
Diffusion Pixelation: A Game Diffusion Model of Rumor & Anti-Rumor Inspired by Image Restoration. IEEE Trans. Knowl. Data Eng. 35(5): 4682-4694 (2023) - [c41]Yue Cheng, Hongji Zou, Jiayu He
MMFuzz: Towards Enhancing RTL Fuzz Testing Using Metric Feedbacks Based on Markov Chain. ATS 2023: 1-6 - [c40]Yan Pi
ESFO: Equality Saturation for FIRRTL Optimization. ACM Great Lakes Symposium on VLSI 2023: 581-586 - [c39]Tun Li, Mingchuan Shi, Hongji Zou, Wanxia Qu:
Towards Accelerating Assertion Coverage Using Surrogate Logic Models. ISCAS 2023: 1-5 - 2022
- [j11]Tianji Dai
ICS-SVM: A user retweet prediction method for hot topics based on improved SVM. Digit. Commun. Networks 8(2): 186-193 (2022) - [j10]Dan Luo
Grammar-based fuzz testing for microprocessor RTL design. Integr. 86: 64-73 (2022) - [j9]Xingyu Lu
Recommendation Model Based on Dynamic Interest Group Identification and Data Compensation. IEEE Trans. Netw. Serv. Manag. 19(1): 89-99 (2022) - [c38]Hongji Zou, Mingchuan Shi, Tun Li, WanXia Qu:
Towards Implementing RTL Microprocessor Agile Design Using Feature Oriented Programming. DATE 2022: 472-477 - 2021
- [c37]Keke Hu, Wanwei Liu, Tun Li:
Rectified Multi-class AdaBoost for Noisy Dataset Based on Weight Adjustment Standard. ASSE 2021: 84-88 - [c36]Tun Li, Wanwei Liu, Liqian Chen, Xiaoguang Mao:
On Enhancing Application-Ability Training in Discrete Mathematics. FIE 2021: 1-5 - [c35]Tun Li, Hongji Zou, Dan Luo, WanXia Qu:
Symbolic Simulation Enhanced Coverage-Directed Fuzz Testing of RTL Design. ISCAS 2021: 1-5 - 2020
- [j8]Tun Li, Yutian Liu, Yanbing Liu, Yunpeng Xiao, Nguyen Nang An:
Attack plan recognition using hidden Markov and probabilistic inference. Comput. Secur. 97: 101974 (2020) - [j7]Tun Li, Jun Ye, Qingping Tan:
Towards functional verifying a family of systemC TLMs. Frontiers Comput. Sci. 14(1): 53-66 (2020) - [j6]Tun Li, Wanwei Liu, Xinrui Guo, Ji Wang:
Software testing without the oracle correctness assumption. Frontiers Comput. Sci. 14(3): 143203 (2020) - [j5]Yonggang Xiao
Edge Computing and Blockchain for Quick Fake News Detection in IoV. Sensors 20(16): 4360 (2020) - [c34]Wanwei Liu, Liangze Yin, Tun Li:
Compiling FLres on Finite Words. SETTA 2020: 108-123
2010 – 2019
- 2019
- [j4]Jian Hu, Tun Li, Sikun Li:
Formal Equivalence Checking Between System-Level and RTL Descriptions without Pre-Given Mapping Information. J. Circuits Syst. Comput. 28(10): 1950163:1-1950163:16 (2019) - 2016
- [c33]Jian Hu, Tun Li, Sikun Li:
Equivalence checking between SLM and RTL using machine learning techniques. ISQED 2016: 129-134 - 2015
- [j3]Jian Hu, Tun Li, Sikun Li:
Equivalence checking between SLM and TLM using coverage directed simulation. Frontiers Comput. Sci. 9(6): 934-943 (2015) - [c32]Tun Li, Jian Hu, Yang Guo, Sikun Li, QingPing Tan:
Equivalence checking of scheduling in high-level synthesis. ISQED 2015: 257-262 - [c31]Jian Hu, Tun Li, Sikun Li:
Formal equivalence checking between SLM and RTL descriptions. SoCC 2015: 131-136 - 2013
- [j2]Rui Wang
Bounded Model Checking of ETL Cooperating with Finite and Looping Automata Connectives. J. Appl. Math. 2013: 462532:1-462532:12 (2013) - [c30]Tun Li, Dan Zhu, Sikun Li, Yang Guo:
Application specified soft error failure rate analysis using sequential equivalence checking techniques. ASP-DAC 2013: 608-613 - [c29]Jian Hu, Tun Li, Sikun Li:
Equivalence Checking between SLM and TLM Using Coverage Directed Simulation. CAD/Graphics 2013: 101-106 - [c28]Tun Li, Yang Guo, Wanwei Liu, Mingsheng Tang
Translation validation of scheduling in high level synthesis. ACM Great Lakes Symposium on VLSI 2013: 101-106 - [c27]Tun Li, Yang Guo, Wanwei Liu, Chiyuan Ma:
Efficient translation validation of high-level synthesis. ISQED 2013: 516-523 - [c26]Tun Li, Wanwei Liu, Xiaoguang Mao, Huiping Zhou:
Introduction to programming: science or art? ITiCSE 2013: 324 - 2012
- [c25]Jiaqing Xu, Qi Lv, Tun Li, Yong Dou:
A bio-inspired self-organizing approach for multicellular embryonic architecture. AHS 2012: 145-151 - 2011
- [c24]Jun Ye, Qingping Tan, Tun Li, GuoRong Cao:
FeatureVerilog: Extending Verilog to Support Feature-Oriented Programming. IPDPS Workshops 2011: 302-305 - [c23]Jun Ye, QingPing Tan, Tun Li:
Separation of communication and computation in SystemC/TLM modeling: A Feature-Oriented approach. ISQED 2011: 481-485 - 2010
- [c22]Dan Zhu, Tun Li, Sikun Li:
On Soft Error Immunity of Sequential Circuits. Asian Test Symposium 2010: 106-110 - [c21]Dan Zhu, Tun Li, Sikun Li:
An Approximate Soft Error Reliability Sorting Approach Based on State Analysis of Sequential Circuits. DFT 2010: 209-217 - [c20]Jun Ye, QingPing Tan, Tun Li, Bin Wu, Yuanru Meng:
Feature-Oriented Refactoring Proposal for Transaction Level Models in SoCLib. FDL 2010: 22-27
2000 – 2009
- 2009
- [c19]Jun Ye, Tun Li, QingPing Tan:
The application of Aspectual Feature Module in the development and verification of SystemC models. FDL 2009: 1-6 - 2008
- [c18]WanXia Qu, Tun Li, Yang Guo, Xiaodong Yang:
Explicit Model Checking Based on Integer Pointer and Fibonacci Hash. ICYCS 2008: 844-849 - [c17]Dan Zhu, Tun Li, Yang Guo, Sikun Li:
2D Decomposition Sequential Equivalence Checking of System Level and RTL Descriptions. ISQED 2008: 637-642 - 2007
- [c16]Yang Guo, WanXia Qu, Tun Li, Sikun Li:
Coverage Driven Test Generation Framework for RTL Functional Verification. CAD/Graphics 2007: 321-326 - [c15]Sikun Li, Dawei Wang, Tun Li, Yong Dou:
Distributed Collaborative Partition Method of Reconfigurable SoC Using Ant Colony Optimization. CSCWD 2007: 133-138 - [c14]Tun Li, Sikun Li, Jinshan Yu, Yang Guo:
A Novel Collaborative Verification Environment for SoC Co-Verification. CSCWD 2007: 145-150 - [c13]Zhihui Xiong, Maojun Zhang, Yunli Wang, Tun Li, Sikun Li:
Fast Panorama Unrolling of Catadioptric Omni-Directional Images for Cooperative Robot Vision System. CSCWD 2007: 1100-1104 - [c12]Tun Li, Yang Guo, Sikun Li, Wei Dong, Rangyu Deng:
Experiences Teaching Functional Verification Techniques with Practical Designs. MSE 2007: 93-94 - 2006
- [c11]Jinshan Yu, Tun Li, Yang Guo, QingPing Tan:
Scheduling of Transactions Based on Extended Scheduling Timed Petri Nets for SoC System-Level Test-Case Generation. EUC 2006: 732-741 - 2005
- [c10]Tun Li, Dan Zhu, Lei Liang, Yang Guo, Sikun Li:
Automatic functional test program generation for microprocessor verification. ASP-DAC 2005: 1039-1042 - [c9]Tun Li, Yang Guo, Sikun Li, GongJie Liu:
Predicate Abstraction of RTL Verilog Descriptions Using Constraint Logic Programming. ATVA 2005: 174-186 - [c8]Tun Li, Yang Guo, GongJie Liu, Sikun Li:
Functional Vectors Generation for RT-Level Verilog Descriptions Based on Path Enumeration and Constraint Logic Programming. DSD 2005: 17-25 - [c7]Tun Li, Dan Zhu, Yang Guo, GongJie Liu, Sikun Li:
MA2TG: A Functional Test Program Generator for Microprocessor Verification. DSD 2005: 176-183 - [c6]Tun Li, Yang Guo, Sikun Li, Dan Zhu:
Applying Constraint Logic Programming to Predicate Abstraction of RTL Verilog Descriptions. MICAI 2005: 175-184 - 2004
- [j1]Tun Li, Yang Guo, Sikun Li:
Automatic Circuit Extractor for HDL Description Using Program Slicing. J. Comput. Sci. Technol. 19(5): 718-728 (2004) - [c5]Tun Li, Yang Guo, Sikun Li, Fujiang Ao, Gongjie Li:
Parallel verilog simulation: architecture and circuit partition. ASP-DAC 2004: 644-646 - [c4]Tun Li, Yang Guo, Sikun Li:
CLP Based Static Property Checking. ATVA 2004: 495-498 - [c3]Tun Li, Yang Guo, Sikun Li:
Assertion-based automated functional vectors generation using constraint logic programming. ACM Great Lakes Symposium on VLSI 2004: 288-291 - [c2]Tun Li, Yang Guo, Sikun Li:
Design and Implementation of a Parallel Verilog Simulator: PVSim. VLSI Design 2004: 329-334 - 2003
- [c1]Tun Li, Yang Guo, Sikun Li:
An Automatic Circuit Extractor for RTL Verification. Asian Test Symposium 2003: 154-160
Coauthor Index
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last updated on 2024-11-26 21:46 CET by the dblp team
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