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Naraig Manjikian
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2010 – 2019
- 2018
- [j7]Shervin Vakili
, J. M. Pierre Langlois, Yvon Savaria, Naraig Manjikian:
Enhanced Bloom filter utilisation scheme for string matching using a splitting approach. IET Commun. 12(7): 868-875 (2018) - 2017
- [c30]Naraig Manjikian:
A study of maximum frequency in FPGA chips using mesh and toroid circuit topologies. CCECE 2017: 1-6 - 2016
- [c29]Naraig Manjikian:
Retargeting and enhancing a compact multitasking kernel for the Altera Nios II processor. CCECE 2016: 1-5 - 2015
- [c28]Naraig Manjikian:
Dynamic RAM-based programs and tasks in the freescale MQX operating system. CCECE 2015: 706-711 - 2014
- [c27]Tayler Sokalski, Naraig Manjikian:
Automatic generation of parallelized FFT logic for implementation in FPGA chips. NEWCAS 2014: 213-216 - 2013
- [c26]Naraig Manjikian, Alexander Ferdynus, Laszlo Katona:
A graphical software tool with integer linear programming for microcontroller input/output interface selection feasibility. CCECE 2013: 1-6 - [c25]Naraig Manjikian, Laszlo Katona, Alexander Ferdynus, Simon V. Chamlian, Pavel Katkov:
Implementation and performance assessment of Linux device drivers for the coldfire MCF54418 microcontroller. CCECE 2013: 1-5 - [c24]Tayler Sokalski, Naraig Manjikian:
A hardware test platform in field-programmable logic for parallelized digital signal processing. CCECE 2013: 1-5 - 2012
- [c23]Ahmad Khayyat
, Naraig Manjikian:
Performance optimization of a data transfer controller for parallel matrix multiplication in FPGAS. CCECE 2012: 1-6 - [c22]Edin Kadric, Naraig Manjikian, Zeljko Zilic:
An FPGA implementation for a high-speed optical link with a PCIe interface. SoCC 2012: 83-87 - 2011
- [c21]Bo Fan, Naraig Manjikian:
Analysis and parallelization of JPEG-2000 reference software. CCECE 2011: 1322-1326 - [c20]Ahmad Khayyat
, Naraig Manjikian:
Controller design for matrix multiplication on FPGAs. CCECE 2011: 1327-1332 - 2010
- [c19]Assem A. M. Bsoul, Naraig Manjikian, Li Shang:
Reliability- and process variation-aware placement for FPGAs. DATE 2010: 1809-1814
2000 – 2009
- 2009
- [c18]Jonathan Roth, Naraig Manjikian, Subramania Sudharsanan:
Performance optimization and parallelization of turbo decoding for software-defined radio. CCECE 2009: 804-809 - 2006
- [c17]Naraig Manjikian, Cindy Mark, Mohanarajah Sinnathamby, James Reed, Huang Jin:
Enhancements and Applications of a Versatile Software Tool for High-Level Specification of Single-Chip Systems. CCECE 2006: 793-798 - [c16]Mohanarajah Sinnathamby, Subramania Sudharsanan, Naraig Manjikian:
Enhanced Architectural Support for Variable-Length Decoding. ICME 2006: 2045-2048 - 2004
- [c15]Naraig Manjikian, Huang Jin, James Reed, Nathan Cordeiro:
Architecture and Implementation of Chip Multiprocessors: Custom Logic Components and Software for Rapid Prototyping. ICPP 2004: 483-492 - 2002
- [j6]Peter M. Ewert, Naraig Manjikian:
Simulation of an Integrated Architecture for IP-over-ATM Frame Processing. Simul. 78(4): 249-257 (2002) - 2001
- [j5]Peter M. Ewert, Naraig Manjikian:
Hardware/software tradeoffs for IP-over-ATM frame reassembly in an integrated architecture. Comput. Commun. 24(9): 768-780 (2001) - [j4]Naraig Manjikian:
Multiprocessor enhancements of the SimpleScalar tool set. SIGARCH Comput. Archit. News 29(1): 8-15 (2001) - [j3]Naraig Manjikian:
More enhancements of the simplescalar tool set. SIGARCH Comput. Archit. News 29(4): 5-12 (2001) - [j2]Naraig Manjikian, Tarek S. Abdelrahman:
Exploiting Wavefront Parallelism on Large-Scale Shared-Memory Multiprocessors. IEEE Trans. Parallel Distributed Syst. 12(3): 259-271 (2001) - [c14]Naraig Manjikian:
Parallel simulation of multiprocessor execution: implementation and results for simplescalar. ISPASS 2001: 147-151 - 2000
- [c13]Naraig Manjikian:
A Vector Multiprocessor for Real-Time Multi-User Detection in Spread-Spectrum Communication. ASAP 2000: 185-194 - [c12]R. Grindley, Tarek S. Abdelrahman, Stephen Dean Brown, S. Caranci, D. DeVries, Benjamin Gamsa, A. Grbic, M. Gusat, R. Ho, Orran Krieger, Guy G. Lemieux, K. Loveless, Naraig Manjikian, P. McHardy, Sinisa Srbljic, Michael Stumm, Zvonko G. Vranesic, Zeljko Zilic:
The NUMAchine Multiprocessor. ICPP 2000: 487-496 - [c11]Naraig Manjikian:
Enhancements and applications of the SimpleScalar simulator for undergraduate and graduate computer architecture education. WCAE 2000: 8 - [c10]Naraig Manjikian:
In-lecture hardware demonstrations with a logic analyzer to illustrate pipelined execution and cache/memory behavior. WCAE 2000: 15 - [c9]Peter M. Ewert, Naraig Manjikian:
Optimizing software performance for IP frame reassembly in an integrated architecture. Workshop on Software and Performance 2000: 29-37
1990 – 1999
- 1998
- [c8]A. Grbic, Stephen Dean Brown, S. Caranci, R. Grindley, M. Gusat, Guy G. Lemieux, K. Loveless, Naraig Manjikian, Sinisa Srbljic, Michael Stumm, Zvonko G. Vranesic, Zeljko Zilic:
Design and Implementation of the NUMAchine Multiprocessor. DAC 1998: 66-69 - [c7]Tarek S. Abdelrahman, Naraig Manjikian, Gary Liu, Sudarsan Tandri:
Locality Enhancement for Large-Scale Shared-Memory Multiprocessors. LCR 1998: 335-342 - 1997
- [j1]Naraig Manjikian, Tarek S. Abdelrahman:
Fusion of Loops for Parallelism and Locality. IEEE Trans. Parallel Distributed Syst. 8(2): 193-209 (1997) - [c6]Naraig Manjikian:
Combining Loop Fusion with Prefetching on Shared-memory Multiprocessors. ICPP 1997: 78-83 - 1996
- [c5]Stephen Dean Brown, Naraig Manjikian, Zvonko G. Vranesic, S. Caranci, A. Grbic, R. Grindley, M. Gusat, K. Loveless, Zeljko Zilic, Sinisa Srbljic:
Experience in Designing a Large-scale Multiprocessor using Field-Programmable Devices and Advanced CAD Tools. DAC 1996: 427-432 - [c4]Naraig Manjikian, Tarek S. Abdelrahman:
Scheduling of Wavefront Parallelism on Scalable Shared-memory Multiprocessors. ICPP, Vol. 3 1996: 122-131 - 1995
- [c3]Naraig Manjikian, Tarek S. Abdelrahman:
Fusion of Loops for Parallelism and Locality. ICPP (2) 1995: 19-28 - 1993
- [c2]Naraig Manjikian, Wayne M. Loucks:
High performance parallel logic simulations on a network of workstations. PADS 1993: 76-84 - 1992
- [c1]Naraig Manjikian, Wayne M. Loucks:
Using split event sets to form and schedule event combinations in discrete event simulation. Annual Simulation Symposium 1992: 184-191
Coauthor Index
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