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SAMOS 2003 & 2004: Samos, Greece
- Andy D. Pimentel, Stamatis Vassiliadis:
Computer Systems: Architectures, Modeling, and Simulation, Third and Fourth International Workshops, SAMOS 2003 and SAMOS 2004, Samos, Greece, July 21-23, 2003 and July 19-21, 2004, Proceedings. Lecture Notes in Computer Science 3133, Springer 2004, ISBN 3-540-22377-0
SAMOS III - Reconfigurable Computing
- Stamatis Vassiliadis, Georgi Gaydadjiev
, Koen Bertels, Elena Moscu Panainte:
The Molen Programming Paradigm. 1-10 - Georgi Kuzmanov, Georgi Gaydadjiev
Loading rho-µ-Code: Design Considerations. 11-19 - Stéphane Chevobbe
RAMPASS: Reconfigurable and Advanced Multi-processing Architecture for Future Silicon Systems. 20-29 - Christian Haubelt, Dirk Koch, Jürgen Teich:
Basic OS Support for Distributed Reconfigurable Hardware. 30-38 - Jens Peter Wittenburg, Ulrich Schreiber, Ulrich Gries, Markus Schneider, Tim Niggemeier:
A Cost-Efficient RISC Processor Platform for Real Time Audio Applications. 39-48 - Wayne Luk:
Customising Processors: Design-Time and Run-Time Opportunities. 49-58 - Erwan Fabiani, Christophe Gouyen, Bernard Pottier:
Intermediate Level Components for Reconfigurable Platforms. 59-68 - Carsten Reuter, Javier Martín-Langerwerf, Hans-Joachim Stolberg, Peter Pirsch:
Performance Estimation of Streaming Media Applications for Reconfigurable Platforms. 69-77
SAMOS III - Architectures and Implementation
- Radhakrishnan Sivakumar, Vassilios V. Dimakopoulos, Nikitas J. Dimopoulos:
CoDeL: Automatically Synthesizing Network Interface Controllers. 78-87 - Miquel Pericàs, Eduard Ayguadé, Javier Zalamea, Josep Llosa
Performance and Power Evaluation of Clustered VLIW Processors with Wide Functional Units. 88-97 - Ulrich Heinkel, Claus Mayer, Charles F. Webb, Hans Sahm, Werner Haas, Stefan Gossens:
An Optimized Flow for Designing High-Speed, Large-Scale CMOS ASIC SoCs. 98-107 - Tuomas Järvinen, Jarmo Takala:
Register-Based Permutation Networks for Stride Permutations. 108-117 - David Guevorkian, Petri Liuha, Aki Launiainen, Ville Lappalainen:
A Family of Accelerators for Matrix-Vector Arithmetics Based on High-Radix Multiplier Structures. 118-127 - Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon:
Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability. 128-137 - Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr:
Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs. 138-148
SAMOS III - Compilers, System Modeling, and Simulation
- Miia Viitanen, Timo D. Hämäläinen:
Comparison of Data Dependence Analysis Tests. 149-158 - Gordon Cichon, Gerhard P. Fettweis:
MOUSE: A Shortcut from Matlab Source to SIMD DSP Assembly Code. 159-167 - Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, Petri Liuha:
High-Level Energy Estimation for ARM-Based SOCs. 168-177 - Cagkan Erbas, Simon Polstra, Andy D. Pimentel:
IDF Models for Trace Transformations: A Case Study in Computational Refinement. 178-190
Systems, Architectures, Modeling, and Simulation 2004 (SAMOS IV)
- Kees A. Vissers:
Programming Extremely Flexible Platforms. 191
SAMOS IV - Reconfigurable Computing
- Georgi Kuzmanov, Georgi Gaydadjiev
The Virtex II ProTM MOLEN Processor. 192-202 - Dirk Stroobandt, Hendrik Eeckhaut, Harald Devos, Mark Christiaens, Fabio Verdicchio, Peter Schelkens:
Reconfigurable Hardware for a Scalable Wavelet Video Decoder and Its Performance Requirements. 203-212 - Pedro C. Diniz:
Design Space Exploration for Configurable Architectures and the Role of Modeling, High-Level Program Analysis and Learning Techniques. 213-223 - João M. P. Cardoso
Modeling Loop Unrolling: Approaches and Open Issues. 224-233 - João M. P. Cardoso
Self-loop Pipelining and Reconfigurable Dataflow Arrays. 234-243 - François Charot, Madeleine Nyamsi, Patrice Quinton, Charles Wagner:
Architecture Exploration for 3G Telephony Applications Using a Hardware-Software Prototyping Platform. 244-253 - John McAllister, Roger F. Woods, Richard L. Walke:
Embedded Context Aware Hardware Component Generation for Dataflow System Exploration. 254-263 - Jérôme Lemaitre, Sylvain Alliot, Ed F. Deprettere:
On the (Re-)Use of IP-Components in Re-configurable Platforms. 264-273 - Nicolas Telle, Wayne Luk, Ray C. C. Cheung:
Customising Hardware Designs for Elliptic Curve Cryptography. 274-283 - Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis:
Dynamic Hardware Reconfigurations: Performance Impact for MPEG2. 284-292 - Joel Cambonie, Sylvain Guérin, Ronan Keryell, Loïc Lagadec, Bernard Pottier, Olivier Sentieys, Bernt Weber, Samar Yazdani:
Compiler and System Techniques for soc Distributed Reconfigurable Accelerators. 293-302
SAMOS IV - Architectures and Implementation
- Júlio C. B. de Mattos, Antonio Carlos Schneider Beck, Luigi Carro, Flávio Rech Wagner:
Design Space Exploration with Automatic Selection of SW and HW for Embedded Applications. 303-312 - Michael Hosemann, Gerhard P. Fettweis:
On Enhancing SIMD-Controlled DSPs for Performing Recursive Filtering. 313-322 - Iosif Antochi, Ben H. H. Juurlink, Stamatis Vassiliadis, Petri Liuha:
Memory Bandwidth Requirements of Tile-Based Rendering. 323-332 - Nainesh Agarwal, Nikitas J. Dimopoulos:
Using CoDeL to Rapidly Prototype Network Processsor Extensions. 333-342 - Gordon Cichon, Pablo Robelly, Hendrik Seidel, Emil Matús, Marcus Bronzel, Gerhard P. Fettweis:
Synchronous Transfer Architecture (STA). 343-352 - Hendrik Seidel, Emil Matús, Gordon Cichon, Pablo Robelly, Marcus Bronzel, Gerhard P. Fettweis:
Generated DSP Cores for Implementation of an OFDM Communication System. 353-362 - Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Costas E. Goutis:
A Novel Data-Path for Accelerating DSP Kernels. 363-372 - Jarmo Takala, Konsta Punkka:
Scalable FFT Processors and Pipelined Butterfly Units. 373-382 - Chris R. Jesshope:
Scalable Instruction-Level Parallelism.. 383-392 - Michael J. Schulte, C. John Glossner, Suman Mamidi, Mayan Moudgill, Stamatis Vassiliadis:
A Low-Power Multithreaded Processor for Baseband Communication Systems. 393-402 - Esther Salamí, Mateo Valero:
Initial Evaluation of Multimedia Extensions on VLIW Architectures. 403-412 - Erno Salminen, Vesa Lahtinen, Tero Kangas, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen:
HIBI v.2 Communication Network for System-on-Chip. 413-422
SAMOS IV - System Modeling, and Simulation
- Chia-Jui Hsu, Fuat Keceli, Ming-Yung Ko, Shahrooz Shahparnia, Shuvra S. Bhattacharyya:
DIF: An Interchange Format for Dataflow-Based Design Tools. 423-432 - Paul Feautrier:
Scalable and Modular Scheduling. 433-442 - Andreas Wieferink, Malte Doerper, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr:
Early ISS Integration into Network-on-Chip Designs. 443-452 - Antoine Fraboulet, Tanguy Risset, Antoine Scherrer:
Cycle Accurate Simulation Model Generation for SoC Prototyping. 453-462 - Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun:
Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting. 463-473 - Tero Kangas, Jouni Riihimäki, Erno Salminen, Vesa Lahtinen, Heikki Orsila, Kimmo Kuusilinna, Timo D. Hämäläinen:
A Communication-Centric Design Flow for HIBI-Based SoCs. 474-483 - Holger Blume
Performance Analysis of SoC Communication by Application of Deterministic and Stochastic Petri Nets. 484-493 - Ioan Cimpian, Alexandru Turjan, Ed F. Deprettere, Erwin A. de Kock:
Communication Optimization in Compaan Process Networks. 494-506 - Jürgen Teich, Shuvra S. Bhattacharyya:
Analysis of Dataflow Programs with Interval-Limited Data-Rates. 507-518 - Alexey Kupriyanov, Frank Hannig, Jürgen Teich:
High-Speed Event-Driven RTL Compiled Simulation. 519-529 - Mark Thompson, Andy D. Pimentel:
A High-Level Programming Paradigm for SystemC. 530-539 - Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis:
Power, Performance and Area Exploration for Data Memory Assignment of Multimedia Applications. 540-549 - Laurentiu Nicolae, Ed F. Deprettere:
Constraints Derivation and Propagation for Large-Scale Embedded Systems Exploration. 550-560
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