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15th RSP 2004: Geneva, Switzerland
- 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland. IEEE Computer Society 2004, ISBN 0-7695-2159-2
Keynote Speech
- Rolf Drechsler:
Towards Formal Verification on the System Level. 2-5
Formal Specification and Verification
- Ki-Seok Bang, Jin-Young Choi, Sung-Ho Jang:
Formal Specification and Verification of Embedded System with Shared Resources. 8-14 - David J. Greaves:
Automated Hardware Synthesis from Formal Specification Using SAT Solvers. 15-20 - Swapan Bhattacharyya, Joydeep Bhattacharyya, Adrish Ray Chaudhuri:
ASET: A Formal Model for System Emulation and Verification. 21-28 - Doron Drusinsky, Man-tak Shing:
TLCharts: Armor-plating Harel Statecharts with Temporal Logic Conditions. 29-36
Co-Design Tools and Techniques
- Moo-Kyoung Chung, Chong-Min Kyung:
Improvement of Compiled Instruction Set Simulator by Increasing Flexibility a. 38-44 - Amjad Mohsen, Richard Hofmann:
Characterizing Power Consumption and Delay of Functional/Library Components for Hardware/Software Co-Design of Embedded Systems. 45-52 - Hideaki Yanagisawa, Minoru Uehara, Hideki Mori:
Automatic Generation of a Simulation Compiler by a HW/SW Co-Design System. 53-59
Poster Presentation
- Chankin Park, Seungmo Cho, Jaewook Lee, Hyungjun Park:
Co-Validation Environment for Memory Card. 62-65 - Arnaud Grasset, Frédéric Rousseau, Ahmed Amine Jerraya:
Network Interface Generation for MPSOC: From Communication Service Requirements to RTL Implementation. 66-69 - M. De Nobili, Robert W. Stewart, Graham C. Freeland:
Rapid Prototyping and Performance Analysis for CDMA2000. 70-73 - Ying Chen, Dennis Abts, David J. Lilja:
State Pruning for Test Vector Generation for a Multiprocessor Cache Coherence Protocol. 74-77
System Modeling and Architecture (I)
- Ferid Gharsalli, Amer Baghdadi, Marius Bonaciu, Giedrius Majauskas, Wander O. Cesário, Ahmed Amine Jerraya:
An Efficient Architecture for the Implementation of Message Passing Programming Model on Massive Multiprocessor. 80-87 - Adriano Sarmento, Wander O. Cesário, Ahmed Amine Jerraya:
Automatic Building of Executable Models from Abstract SoC Architectures Made of Heterogeneous Subsystems. 88-95 - Rawat Siripokarpirom, Friedrich Mayer-Lindenberg:
Hardware-Assisted Simulation and Evaluation of IP Cores Using FPGA-Based Rapid Prototyping Boards. 96-102 - M. Diaby, Matthieu Tuna, Jean Lou Desbarbieux, Franck Wajsbürt:
High Level Synthesis Methodology from C to FPGA Used for a Network Protocol Communication. 103-108
Keynote Speech
- Shane Sendall:
Domain Driven Software Development -- A World of Transformations. 110-112
Methodologies and Tools
- Pavle Belanovic, Martin Holzer, Bastian Knerr, Markus Rupp, Guillaume Sauzon:
Automatic Generation of Virtual Prototypes. 114-118 - Kang Zhang, Guang-Lei Song, Jun Kong:
Rapid Software Prototyping Using Visual Language Techniques. 119-126 - Frédéric Gilliers, Jean-Pierre Velu, Fabrice Kordon:
Generation of Distributed Programs in Their Target Execution Environment. 127-134 - George M. Lawler, Paul E. Young:
Approaching Interoperability from the Bottom up: A Lattice Structure for the Object-Oriented Method for Interoperability (OOMI). 135-142
FPGA-Based Systems (I)
- André Meisel, Markus Visarius, Wolfram Hardt, Stefan Ihmor:
Self-Reconfiguration of Communication Interfaces. 144-150 - Daniel Denning, James Irvine, Derek Stark, Malachy Devlin:
Multi-User FPGA Co-Simulation over TCP/IP. 151-156 - Camel Tanougast, Yves Berviller, Christian Mannino, Hassan Rabah, Michael Janiaut, Serge Weber:
SystemC Model of a MPEG-2 DVB-T Bit-Rate Measurement Architecture for FPGA Implementation. 157-163 - Kenneth B. Kent, Hejun Ma, Micaela Serra:
Rapid Prototyping of a Co-Designed Java Virtual Machine. 164-171
Case Studies
- Nikolaos Papandreou, Maria Varsamou, Theodore Antonakopoulos:
Transmission Systems Prototyping Based on Stateflow/Simulink Models. 174-179 - Apostolos Dollas, Kyprianos Papademetriou, Euripides Sotiriades, Dimitrios Theodoropoulos, Iosif Koidis, George Vernardos:
A Case Study on Rapid Prototyping of Hardware Systems: The Effect of CAD Tool Capabilities, Design Flows, and Design Styles. 180-186 - Ralf Ludewig, Thomas Hollstein, Falko Schütz, Manfred Glesner:
Rapid Prototyping of an Integrated Testing and Debugging Unit. 187-192 - Paolo Martinelli, Armin Wellig, Julien Zory:
Transaction-Level Prototyping of a UMTS Outer-Modem for System-on-Chip Validation and Architecture Exploration. 193-200
System Modeling and Architecture (II)
- James Bret Michael, Man-tak Shing, Michael H. Miklaski, Joel D. Babbitt:
Modeling and Simulation of System-of-Systems Timing Constraints with UML-RT and OMNeT++. 202-209 - Fabiano Hessel, Vitor M. da Rosa, Igor M. Reis, Ricardo Planner, César A. M. Marcon, Altamiro Amadeu Susin:
Abstract RTOS Modeling for Embedded Systems. 210-216 - Sylvain Alliot, Ed F. Deprettere:
Architecture Exploration of a Large Scale System. 217-224
FPGA-Based Systems (II)
- Maryse Wouters, Peter Van Wesemael, Roeland Vandebriel, Andy Dewilde, Michael Libois:
Real Time Prototyping of Broadband Wireless LAN Systems. 226-231 - Moisès Serra, Pere Martí-Puig, Jordi Carrabina:
Implementation of a Channel Equalizer for OFDM Wireless LANs. 232-238 - Yann Thoma, Eduardo Sanchez, Daniel Roggen, Carl Hetherington, Juan Manuel Moreno:
Prototyping with a Bio-Inspired Reconfigurable Chip. 239-246
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