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10th FDL 2007: Barcelona, Spain
- Forum on specification and Design Languages, FDL 2007, September 18-20, 2007, Barcelona, Spain, Proceedings. ECSI 2007
AMS-1: Curcuit level simulation techniques
- Steven P. Levitan, Jose A. Martinez, Donald M. Chiarulli:
Non-Linear Circuit Simulation using MATLAB. 1-5 - Juergen Weber, Andreas C. Lemke, Andreas Lehmler, Mario Anton, Sorin A. Huss:
Mixed-Level Modeling Using Configurable MOS Transistor Models. 6-11 - Leran Wang, Chenxu Zhao, Tom J. Kazmierski:
An Extension to VHDL-AMS for AMS Systems with Partial Differential Equations. 12-17
AMS-2: Heterogenous systems
- Tommasso Leonardi, Massimo Conti, Eva Vidal, Eduard Alarcón:
SystemC-WMS modeling of control techniques for switching amplifiers targeting polar RF transmitters. 18-24 - Torsten Mähne, Alain Vachoux:
Proposal for a Bond Graph Based Model of Computation in SystemC-AMS. 25-31 - Fernando Herrera, Eugenio Villar, Christoph Grimm, Markus Damm, Jan Haase:
A general approach to the interoperability of HetSC and SystemC-AMS. 32-37
AMS-3: Advanced modeling methods
- Darius Grabowski, Markus Olbrich, Christoph Grimm, Erich Barke:
Range Arithmetics to Speed up Reachability Analysis of Analog Systems. FDL 2007: 38-43 - Ernst Christen, David Bedrosian, Joachim Haase:
Statistical Modeling with VHDL-AMS. 44-49 - Nima Honarmand, Hasan Sohofi, Maghsoud Abbaspour, Zainalabedin Navabi:
APDL: A Processor Description Language For Design Space Exploration of Embedded Processors. 50-55
AMS-4: Applications
- Mohamad Alassir, Julien Denoulet, Gabriel Vasilescu, Olivier Romain, Romain Arnaud, Patrick Garda:
Modeling Field Bus Communications for Automotive Applications. 56-61 - Thomas Uhle, Karsten Einwich, Joachim Haase:
Efficient Transient Simulation of Lossy Coupled Interconnects in Digital Communication Applications. 62-67 - Adam Milik, Andrzej Pulka:
Common HDL-Matlab Simulation Environment. 68-73
CSD-1: Abstraction Layers for TLM
- Martin Radetzki, Rauf Salimi Khaligh:
Modelling Alternatives for Cycle Approximate Bus TLMs. 74-79 - Hector Posadas, David Quijano, Eugenio Villar, Marcos Martínez:
Protocol Bus Modeling using inheritance with TLM2.0. 80-85 - Robert Günzel, Wolfgang Klingauf, James Aldis:
Combinatorial Dependencies in Transaction Level Models. 86-91 - Mark Burton, James Aldis, Robert Günzel, Wolfgang Klingauf:
Transaction Level Modelling: A reflection on what TLM is and how TLMs may be classified. 92-97
CSD-2: Combining models of computing
- Jens Brandt, Klaus Schneider:
How Different are Esterel and SystemC?. FDL 2007: 98-103 - Tareq Hasan Khan, Ali Habibi, Sofiène Tahar, Otmane Aït Mohamed:
Autometic Generation of SystemC Transactors from AsmL Specification. 104-109 - Cedric Koch-Hofer, Marc Renaudin:
Timed Asynchronous Circuits Modeling using SystemC. 110-115 - Claus Brunzema, Wolfgang Nebel:
CSP with Synthesisable SystemC(tm) and OSSS. 116-121
CSD-3: Modeling paradigms for embedded systems
- Johan Lilius, Ivan Porres, Kim Sandström, Dragos Truscan:
SystemC-based Simulation of the MICAS Architecture. 122-127 - Jens Gladigau, Christian Haubelt, Bernhard Niemann, Jürgen Teich:
Mapping Actor-Oriented Models to TLM Architectures. 128-133 - Mario Korte, Frank Slomka:
C-based System Development of Asynchronous Distributed Systems. 134-139
CSD-4: Test and Verification
- Frank Rogin, Christian Genz, Rolf Drechsler, Steffen Rülke:
An Integrated SystemC Debugging Environment. 140-145 - Daniel Große, Hernan Peraza, Wolfgang Klingauf, Rolf Drechsler:
Measuring the Quality of a SystemC Testbench by using Code Coverage Techniques. 146-151 - Staffan Berg:
Algorithmic Test Generation - a New Approach to testbench Creation. 152-158
CSD-5: Specific languages & applications
- Giovanni Agosta, Gerardo Pelosi:
A Domain Specific Language for Cryptography. 159-164 - Luis Baldez, Sascha de Pena, Joan Vidal:
The Unified Models Methodology: Applications to Inkjet Printing. 165-170 - Parisa Razaghi, Shahrzad Mirkhani, Zainalabedin Navabi:
A Configurable Transaction Level Model of a Generic Interconnection Part of Embedded Systems Used in an ESL Design Library. 171-176 - Sylvain Huet, Sébastien Le Nours, Olivier Pasquier, Emmanuel Casseau:
Granularity Issues in Transaction Level Modelling Digital Signal Processing Applications. 177-184
CSD-UML: CSD UML Common session
- Per Andersson, Martin Höst:
UML and SystemC - Comparison and Mapping Rules for Automatic Code Generation. 185-190 - Sara Bocchio, Elvinia Riccobene, Alberto Rosti, Patrizia Scandurra:
A complete SystemC UML profile with dynamic features for behavioral descriptions. 191-197 - Marcello Mura, Marco Paolieri:
SC2 StateCharts to SystemC: Automatic Executable Models Generation. 198-203 - Jari Kreku, Mika Hoppari, Kari Tiensyrjä, Per Andersson:
SystemC workload model generation from UML for performance simulation. 204-285
PVD-1: RTL synthesis & mixed signal verification from PSL
- Katell Morin-Allory, Laurent Fesquet, Benjamin Roustan, Dominique Borrione:
Asynchronous online-monitoring of logical and temporal assertions. 286-290 - Martin Schickel, Martin Oberkönig, Martin Schweikert, Hans Eveking:
A Case-Study in Property-Based Synthesis: Generating a Cache Controller from a Property-Set. 291-292 - Ghiath Al Sammane, Mohamed H. Zaki, Zhi Jie Dong, Sofiène Tahar:
Towards Assertion Based Verification of Analog and Mixed Signal Designs Using PSL. 293-298
PVD-2: PSL: the future
PVD-3: Formal verification & high level properties
- Pradeep Kumar Nalla, Jörg Behrend, Prakash Mohan Peranandam, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel:
Grid Based Fast Falsification For Bounded Property Checking. 299-304 - Daniel Karlsson, Petru Eles, Zebo Peng:
Transactor-based Formal Verification of Real-time Embedded Systems. 305-310 - Ayman M. Wahba, Islam A. M. El-Maddah:
Verification of the Properties of Asynchronous Real-Time Distributed Systems using the B-Formalism. 311-209
UML-1: Model driven engineering experiments
- Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla:
A Metamodeling based Framework for Architectural Modeling and Simulator Generation. 210-218 - David H. Akehurst, W. Gareth J. Howells, Klaus D. McDonald-Maier, Behzad Bordbar:
Compiling UML State Diagrams into VHDL: An Experiment in Using Model Driven Development. 219-224 - Waseem Raslan, Ahmed Sameh:
Mapping SysML to SystemC. 225-230
UML-2: Software platform modeling
- Frédéric Thomas, Sébastien Gérard, Jérôme Delatour, François Terrier:
Software Real-time Resource Modeling. FDL 2007: 231-236 - Tero Arpinen, Mikko Setälä, Petri Kukkala, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen:
Modeling Embedded Software Platforms with a UML Profile. 237-242 - Julio Cano, Natividad Martínez Madrid, Ralf Seepold, Fernando López Aguilar:
Model-driven development of embedded system on heterogeneous platforms. 243-248
UML-3: Time modeling & assertion generation
- Frédéric Mallet, Charles André, Robert de Simone:
Modeling of immediate vs. delayed data communications: from AADL to UML Marte. 249-254 - Huafeng Yu, Abdoulaye Gamatié, Éric Rutten, Jean-Luc Dekeyser:
Model Transformations from a Data Parallel Formalism towards Synchronous Languages. FDL 2007: 255-260 - Lun Li, Frank P. Coyle, Mitchell A. Thornton:
Automatic High Level Assertion Generation and Synthesis for Embedded System Design. 261-267
UML-4: MARTE usages
- Robert de Simone, Charles André:
Time Modeling in MARTE. 268-273 - Safouan Taha, Ansgar Radermacher, Sébastien Gérard, Jean-Luc Dekeyser:
MARTE: UML-based Hardware Design from Modelling to Simulation. 274-279 - Pierre Boulet, Philippe Marquet, Éric Piel, Julien Taillard:
Repetitive Allocation Modelling with MARTE. 280-285
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