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"Verifying chip designs at RTL level."

Nan Zhang et al. (2025)

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DOI: 10.1016/J.SCICO.2024.103224

access: closed

type: Journal Article

metadata version: 2024-11-29

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Nan Zhang, Zhijie Xu, Zhenhua Duan, Cong Tian, Wu Wang, Chaofeng Yu:
Verifying chip designs at RTL level. Sci. Comput. Program. 240: 103224 (2025)

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