default search action

combined dblp search
author search
venue search
publication search

ask others

"An Equivalence-Checking Method for Scheduling Verification in High-Level ..."

Chandan Karfa et al. (2008)

> Home

Details and statistics

DOI: 10.1109/TCAD.2007.913390

access: closed

type: Journal Article

metadata version: 2021-03-08

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcad/KarfaSMK08
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcad/KarfaSMK08
Chandan Karfa, Dipankar Sarkar, Chitta Mandal, P. Kumar:
An Equivalence-Checking Method for Scheduling Verification in High-Level Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(3): 556-569 (2008)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.