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Derek Wright
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2020 – today
- 2021
- [j4]Dhruv Patel
, Adam Neale, Derek Wright, Manoj Sachdev
Body Biased Sense Amplifier With Auto-Offset Mitigation for Low-Voltage SRAMs. IEEE Trans. Circuits Syst. I Regul. Pap. 68(8): 3265-3278 (2021) - [c5]Yugal Kishore Maheshwari, Kleber Stangherlin, Derek Wright, Manoj Sachdev:
Ultra Low-power, Low-energy Static Single-phase Clocked Flip-flop. ICECS 2021: 1-4
2010 – 2019
- 2019
- [j3]Dhruv Patel
Hybrid Latch-Type Offset Tolerant Sense Amplifier for Low-Voltage SRAMs. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(7): 2519-2532 (2019) - 2018
- [c4]Dhruv Patel
Sense amplifier offset characterisation and test implications for low-voltage SRAMs in 65 nm. ETS 2018: 1-6
2000 – 2009
- 2009
- [j2]Nitin Mohan, Wilson Fung, Derek Wright, Manoj Sachdev:
A Low-Power Ternary CAM With Positive-Feedback Match-Line Sense Amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(3): 566-573 (2009) - 2006
- [j1]Nitin Mohan, Wilson Fung, Derek Wright, Manoj Sachdev:
Design techniques and test methodology for low-power TCAMs. IEEE Trans. Very Large Scale Integr. Syst. 14(6): 573-586 (2006) - [c3]Nitin Mohan, Wilson Fung, Derek Wright, Manoj Sachdev:
Match Line Sense Amplifiers with Positive Feedback for Low-Power Content Addressable Memories. CICC 2006: 297-300 - 2005
- [c2]Alexandru Romosan, Doron Rotem, Arie Shoshani, Derek Wright:
Co-Scheduling of Computation and Data on Computer Clusters. SSDBM 2005: 103-112 - 2003
- [c1]Derek Wright, Manoj Sachdev:
Transistor-Level Fault Analysis and Test Algorithm Development for Ternary Dynamic Content Addressable Memorie. ITC 2003: 39-47
Coauthor Index
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last updated on 2024-11-19 20:49 CET by the dblp team
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