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Esin Tureci
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2020 – today
- 2024
- [j3]Yuri Alexeev, Maximilian Amsler, Marco Antonio Barroca, Sanzio Bassini, Torey Battelle, Daan Camps, David Casanova, Young Jay Choi, Frederic T. Chong, Charles Chung, Christopher Codella, Antonio D. Córcoles, James Cruise, Alberto Di Meglio, Ivan Duran, Thomas Eckl, Sophia E. Economou, Stephan J. Eidenbenz, Bruce Elmegreen, Clyde Fare, Ismael Faro, Cristina Sanz Fernández, Rodrigo Neumann Barros Ferreira
, Keisuke Fuji, Bryce Fuller, Laura Gagliardi, Giulia Galli, Jennifer R. Glick, Isacco Gobbi, Pranav Gokhale, Salvador de la Puente Gonzalez, Johannes Greiner, Bill Gropp, Michele Grossi, Emanuel Gull, Burns Healy, Matthew R. Hermes
Quantum-centric supercomputing for materials science: A perspective on challenges and future directions. Future Gener. Comput. Syst. 160: 666-710 (2024) - [c7]Marcelo Orenes-Vera, Esin Tureci, Margaret Martonosi, David Wentzlaff:
MuchiSim: A Simulation Framework for Design Exploration of Multi-Chip Manycore Systems. ISPASS 2024: 48-60 - 2023
- [c6]Marcelo Orenes-Vera, Esin Tureci, David Wentzlaff, Margaret Martonosi:
Dalorex: A Data-Local Program Execution and Architecture for Memory-bound Applications. HPCA 2023: 718-730 - [c5]Samuel Alexander Stein, Sara Sussman
HetArch: Heterogeneous Microarchitectures for Superconducting Quantum Systems. MICRO 2023: 539-554 - [c4]Aninda Manocha
Architectural Support for Optimizing Huge Page Selection Within the OS. MICRO 2023: 1213-1226 - [i7]Marcelo Orenes-Vera, Esin Tureci, David Wentzlaff, Margaret Martonosi:
Massive Data-Centric Parallelism in the Chiplet Era. CoRR abs/2304.09389 (2023) - [i6]Samuel Alexander Stein, Sara Sussman, Teague Tomesh, Charles Guinn, Esin Tureci, Sophia Fuhui Lin, Wei Tang, James A. Ang, Srivatsan Chakram, Ang Li, Margaret Martonosi, Frederic T. Chong, Andrew A. Houck, Isaac L. Chuang, Michael Austin DeMarco:
Microarchitectures for Heterogeneous Superconducting Quantum Computers. CoRR abs/2305.03243 (2023) - [i5]Marcelo Orenes-Vera, Esin Tureci, Margaret Martonosi, David Wentzlaff:
DCRA: A Distributed Chiplet-based Reconfigurable Architecture for Irregular Applications. CoRR abs/2311.15443 (2023) - [i4]Marcelo Orenes-Vera, Esin Tureci, David Wentzlaff, Margaret Martonosi:
Tascade: Hardware Support for Atomic-free, Asynchronous and Efficient Reduction Trees. CoRR abs/2311.15810 (2023) - [i3]Marcelo Orenes-Vera, Esin Tureci, Margaret Martonosi, David Wentzlaff:
Muchisim: A Simulation Framework for Design Exploration of Multi-Chip Manycore Systems. CoRR abs/2312.10244 (2023) - 2022
- [c3]Aninda Manocha, Zi Yan, Esin Tureci, Juan L. Aragón
The Implications of Page Size Management on Graph Analytics. IISWC 2022: 199-214 - [d1]Aninda Manocha
The Implications of Page Size Management on Graph Analytics. Zenodo, 2022 - [i2]Marcelo Orenes-Vera, Esin Tureci, David Wentzlaff, Margaret Martonosi:
Dalorex: A Data-Local Program Execution and Architecture for Memory-bound Applications. CoRR abs/2207.13219 (2022) - 2021
- [j2]Aninda Manocha
GraphAttack: Optimizing Data Supply for Graph Applications on In-Order Multicore Architectures. ACM Trans. Archit. Code Optim. 18(4): 53:1-53:26 (2021) - 2020
- [j1]Jake Kirkham, Tyler Sorensen
Foundations of empirical memory consistency testing. Proc. ACM Program. Lang. 4(OOPSLA): 226:1-226:29 (2020) - [c2]Tyler Sorensen
A Simulator and Compiler Framework for Agile Hardware-Software Co-design Evaluation and Exploration. ICCAD 2020: 97:1-97:9 - [c1]Opeoluwa Matthews, Aninda Manocha, Davide Giri, Marcelo Orenes-Vera, Esin Tureci, Tyler Sorensen
MosaicSim: A Lightweight, Modular Simulator for Heterogeneous Systems. ISPASS 2020: 136-148 - [i1]Opeoluwa Matthews, Aninda Manocha, Davide Giri, Marcelo Orenes-Vera, Esin Tureci, Tyler Sorensen, Tae Jun Ham, Juan L. Aragón, Luca P. Carloni, Margaret Martonosi:
The MosaicSim Simulator (Full Technical Report). CoRR abs/2004.07415 (2020)
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last updated on 2024-12-10 20:48 CET by the dblp team
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