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Sven Gesper
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2020 – today
- 2024
- [c7]Frederik Kautz, Sven Gesper, Gia Bao Thieu, Hans-Martin Blüthgen, Holger Blume, Guillermo Payá Vayá:
Multi-Level Prototyping of a Vertical Vector AI Processing System. ASAP 2024: 1-2 - 2023
- [c6]Johannes Knödtel
, Hector Gerardo Muñoz Hernandez
TAPRE-HBM: Trace-Based Processor Rapid Emulation Using HBM on FPGAs. ARC 2023: 307-321 - [c5]Michael Beyer, Sven Gesper
Exploiting Subword Permutations to Maximize CNN Compute Performance and Efficiency. ASAP 2023: 61-68 - [c4]Gia Bao Thieu
ZuSE Ki-Avf: Application-Specific AI Processor for Intelligent Sensor Signal Processing in Autonomous Driving. DATE 2023: 1-6 - [c3]Sven Gesper
N2V2PRO: Neural Network Mapping Framework for a Custom Vector Processor Architecture. ICCE-Berlin 2023: 94-99 - [c2]Sven Gesper
PATARA: Extension of a Verification Framework for RISC-V Instruction Set Implementations. SAMOS 2023: 225-240 - 2021
- [j1]Sven Gesper
Evaluation of Different Processor Architecture Organizations for On-Site Electronics in Harsh Environments. Int. J. Parallel Program. 49(4): 541-569 (2021)
2010 – 2019
- 2019
- [c1]Sven Gesper
Evaluation of Different Processor Architecture Organizations for On-site Electronics in Harsh Environments. SAMOS 2019: 3-17
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last updated on 2024-10-07 21:25 CEST by the dblp team
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