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Nael Mizanur Rahman
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2020 – today
- 2024
- [b1]Nael Mizanur Rahman:
High Performance Compute Accelerators for Radio Frequency Signal Processing Applications. Georgia Institute of Technology, Atlanta, GA, USA, 2024 - [j3]Daehyun Kim
, Nael Mizanur Rahman, Saibal Mukhopadhyay
PRESTO: A Processing-in-Memory-Based k-SAT Solver Using Recurrent Stochastic Neural Network With Unsupervised Learning. IEEE J. Solid State Circuits 59(7): 2310-2320 (2024) - [c15]Minah Lee, Sudarshan Sharma, Wei Chun Wang, Hemant Kumawat, Nael Mizanur Rahman, Saibal Mukhopadhyay:
Cognitive Sensing for Energy-Efficient Edge Intelligence. DATE 2024: 1-6 - [c14]Nael Mizanur Rahman, Uday Kamal, Manish Nagaraj, Shaunak Roy, Saibal Mukhopadhyay:
Driving Autonomy with Event-Based Cameras: Algorithm and Hardware Perspectives. DATE 2024: 1-6 - [c13]Shida Zhang
Measurement of Aging Effect in a Digitally Controlled Inductive Voltage Regulator in 65nm. IRPS 2024: 1-6 - [c12]Nael Mizanur Rahman, Uday Kamal, Venkata Chaitanya Krishna Chekuri, Arvind Singh, Saibal Mukhopadhyay:
Passive Lightweight On-chip Sensors for Power Side Channel Attack Detection. ISCAS 2024: 1-5 - [c11]Nael Mizanur Rahman, Sudarshan Sharma, Coleman DeLude, Wei Chun Wang, Justin Romberg, Saibal Mukhopadhyay:
BeamCIM: A Compute-In-Memory based Broadband Beamforming Accelerator using Linear Embedding. RWS 2024: 46-49 - 2023
- [c10]Sudarshan Sharma, Wei Chun Wang, Coleman DeLude, Minah Lee, Nael Mizanur Rahman, Narasimha Vasishta Kidambi, Justin Romberg, Saibal Mukhopadhyay:
AFE-CIM: A Current-Domain Compute-In-Memory Macro for Analog-to-Feature Extraction. ESSCIRC 2023: 33-36 - [c9]Daehyun Kim, Nael Mizanur Rahman, Saibal Mukhopadhyay:
A 32.5mW Mixed-Signal Processing-in-Memory-Based k-SAT Solver in 65nm CMOS with 74.0% Solvability for 3D-Variable 126-Clause 3-SAT Problems. ISSCC 2023: 418-419 - 2022
- [j2]Edward Lee
A Low-Power Authentication IC for Visible-Light-Based Interrogation. IEEE Trans. Ind. Electron. 69(3): 3120-3130 (2022) - [c8]Shida Zhang
Analysis of the Effect of Hot Carrier Injection in An Integrated Inductive Voltage Regulator. ISLPED 2022: 12:1-12:6 - 2020
- [j1]Jinwoo Kim
Architecture, Chip, and Package Codesign Flow for Interposer-Based 2.5-D Chiplet Integration Enabling Heterogeneous IP Reuse. IEEE Trans. Very Large Scale Integr. Syst. 28(11): 2424-2437 (2020) - [c7]Venkata Chaitanya Krishna Chekuri, Nael Mizanur Rahman, Edward Lee, Arvind Singh, Saibal Mukhopadhyay:
A Fully Synthesized Integrated Buck Regulator with Auto-generated GDS-II in 65nm CMOS Process. CICC 2020: 1-4 - [c6]Edward Lee, Nael Mizanur Rahman, Venkata Chaitanya Krishna Chekuri, Saibal Mukhopadhyay:
An Authentication IC with Visible Light Based Interrogation in 65nm CMOS. CICC 2020: 1-4 - [c5]Nael Mizanur Rahman, Edward Lee, Venkata Chaitanya Krishna Chekuri, Arvind Singh, Saibal Mukhopadhyay:
A Configurable Dual-Mode PRINCE Cipher with Security Aware Pipelining in 65nm for High Throughput Applications. CICC 2020: 1-4 - [c4]Jinwoo Kim, Venkata Chaitanya Krishna Chekuri, Nael Mizanur Rahman, Majid Ahadi Dolatsara, Hakki Mert Torun, Madhavan Swaminathan, Saibal Mukhopadhyay, Sung Kyu Lim:
Silicon vs. Organic Interposer: PPA and Reliability Tradeoffs in Heterogeneous 2.5D Chiplet Integration. ICCD 2020: 80-87 - [c3]Venkata Chaitanya Krishna Chekuri, Arvind Singh, Nael Mizanur Rahman, Edward Lee, Saibal Mukhopadhyay:
Aging Challenges in On-chip Voltage Regulator Design. IRPS 2020: 1-8
2010 – 2019
- 2019
- [c2]Nikhil Chawla
Extracting Side-Channel Leakage from Round Unrolled Implementations of Lightweight Ciphers. HOST 2019: 31-40 - 2017
- [c1]Shaikh Anowarul Fattah, Nael Mizanur Rahman
Stetho-phone: Low-cost digital stethoscope for remote personalized healthcare. GHTC 2017: 1-7
Coauthor Index
aka: Venkata Chaitanya Krishna Chekuri
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last updated on 2024-11-25 22:46 CET by the dblp team
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